COP8-REF-FL1 National Semiconductor, COP8-REF-FL1 Datasheet - Page 18

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COP8-REF-FL1

Manufacturer Part Number
COP8-REF-FL1
Description
KIT REF DESIGN FOR COP8SDR9
Manufacturer
National Semiconductor
Series
COP8™r
Type
MCUr
Datasheet

Specifications of COP8-REF-FL1

Design Resources
COP8 Flash Ref Design Flyer
Contents
PCB, Control Interface, Documentation and 9V Battery
For Use With/related Products
COP8SDR9
Lead Free Status / RoHS Status
Not applicable / Not applicable
www.national.com
4.0 Functional Description
4.7.1 External Reset
The RESET input when pulled low initializes the device. The
RESET pin must be held low for a minimum of one instruc-
tion cycle to guarantee a valid reset. During Power-Up ini-
tialization, the user must ensure that the RESET pin of the
device is held low until the device is within the specified V
voltage. An R/C circuit on the RESET pin with a delay 5
times (5x) greater than the power supply rise time is recom-
mended. Reset should also be wide enough to ensure crys-
tal start-up upon Power-Up.
RESET may also be used to cause an exit from the HALT
mode.
A recommended reset circuit for this device is shown in
Figure 9 .
4.8 OSCILLATOR CIRCUITS
The device has two crystal oscillators to facilitate low power
operation while maintaining throughput when required. Fur-
ther information on the use of the two oscillators is found in
Section 7.0 Power Saving Features. The low speed oscillator
utilizes the L0 and L1 port pins. References in the following
text to CKI will also apply to L0 and references to G7/CKO
will also apply to L1.
4.8.1 Oscillator
CKI is the clock input while G7/CKO is the clock generator
output to the crystal. An on-chip bias resistor connected
between CKI and CKO is provided to reduce system part
count. The value of the resistor is in the range of 0.5M to 2M
(typically 1.0M). shows the component values required for
various standard crystal values. Resistor R2 is on-chip, for
the high speed oscillator, and is shown for reference. Figure
10 shows the crystal oscillator connection diagram. A ce-
WATCHDOG service window of 64k T0 clock cycles. The
Clock Monitor bit being initialized high will cause a Clock
Monitor error following reset if the clock has not reached
the minimum specified frequency at the termination of
reset. A Clock Monitor error will cause an active low error
output on pin G1. This error output will continue until
16–32 T0 clock cycles following the clock frequency
reaching the minimum specified value, at which time the
G1 output will go high.
FIGURE 9. Reset Circuit Using External Reset
20026465
(Continued)
CC
18
ramic resonator of the required frequency may be used in
place of a crystal if the accuracy requirements are not quite
as strict.
The crystal and other oscillator components should be
placed in close proximity to the CKI and CKO pins to mini-
mize printed circuit trace length.
The values for the external capacitors should be chosen to
obtain the manufacturer’s specified load capacitance for the
crystal when combined with the parasitic capacitance of the
trace, socket, and package (which can vary from 0 to 8 pF).
The guideline in choosing these capacitors is:
Manufacturer’s specified load cap = (C
C
C
should be less than or equal to C
4.8.2 Clock Doubler
This device contains a frequency doubler that doubles the
frequency of the oscillator selected to operate the main
microcontroller core. When the oscillator connected to CKI
operates at 10 MHz, the internal clock frequency is 20 MHz,
resulting in an instruction cycle time of 0.5 µs. The output of
the clock doubler is called MCLK and is referenced in many
places within this document.
parasitic
2
R1 (k )
can be trimmed to obtain the desired frequency. C
5.6
0
0
0
TABLE 3. Crystal Oscillator Configuration,
CKI Frequency
3.33 MHz
455 kHz
10 MHz
1 MHz
R2 (M )
FIGURE 10. Crystal Oscillator
On Chip
On Chip
On Chip
On Chip
TABLE 4. Startup Times
High Speed Oscillator
T
A
= 25˚C, V
C1 (pF)
18–36
100
18
18
CC
20026415
1
.
= 5V
100–156
C2 (pF)
18–36
Startup Time
1
18
18
10–30 ms
* C
1–10 ms
3–10 ms
3–20 ms
2
) / (C
CKI Freq.
(MHz)
1
0.455
10
+ C
5
1
2
) +
2

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