C8051F326-TB Silicon Laboratories Inc, C8051F326-TB Datasheet - Page 74
![no-image](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_sml.jpg)
C8051F326-TB
Manufacturer Part Number
C8051F326-TB
Description
BOARD PROTOTYPING W/C8051F326
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet
1.C8051F326-TB.pdf
(140 pages)
Specifications of C8051F326-TB
Contents
Board
Processor To Be Evaluated
C8051F326/F327
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F326
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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- Download datasheet (2Mb)
C8051F326/7
10.2. Internal Low-Frequency (L-F) Oscillator
C8051F326/7 devices include a low-frequency oscillator. The OSCLCN register (see SFR Definition 10.3)
is used to enabled the oscillator.
10.3. CMOS External Clock Input
A CMOS clock can be used as an external clock input. The CMOS clock should be wired to the XTAL2 pin
(P0.3) as shown in Figure 10.1 on Page 71. Port pins must be configured when using the external oscilla-
tor circuit. The Port I/O Crossbar should be configured to allow digital inputs be setting INPUTEN (GPI-
OCN.6). Also, P0.3 should be configured to open drain mode. See Section “11. Port Input/Output” on
page 79 for more information.
74
Bit7:
Bit6–0:
OSCLEN
R/W
Bit7
OSCLEN: Internal L-F Oscillator Enable.
0: Internal L-F Oscillator Disabled.
1: Internal L-F Oscillator Enabled.
Unused. Read = 0000000b. Write = don’t care.
SFR Definition 10.3. OSCLCN: Internal L-F Oscillator Control
Bit6
—
R
Bit5
—
R
Bit4
—
R
Rev. 1.1
Bit3
—
R
Bit2
—
R
Bit1
—
R
Bit0
—
R
SFR Address:
Reset Value
0xxxxxxx
0xE3
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