C8051F206-TB Silicon Laboratories Inc, C8051F206-TB Datasheet - Page 126

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C8051F206-TB

Manufacturer Part Number
C8051F206-TB
Description
BOARD PROTOTYPING W/C8051F206
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F206-TB

Contents
Board
Processor To Be Evaluated
C8051F206
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F206
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
C8051F2xx
Setting TR0 does not reset the timer register. The timer register should be initialized to the desired value
before enabling the timer.
TL1 and TH1 form the 13-bit register for Timer 1 in the same manner as described above for TL0 and TH0.
Timer 1 is configured and controlled using the relevant TCON and TMOD bits just as with Timer 0.
17.1.2. Mode 1: 16-bit Counter/Timer
Mode 1 operation is the same as Mode 0, except that the counter/timer registers use all 16 bits. The coun-
ter/timers are enabled and configured in Mode 1 in the same manner as for Mode 0.
126
X = Don’t Care
TR0
SYSCLK
0
1
1
1
/INT0
T0
GATE0
GATE0
TR0
PORT0
X
0
1
1
MUX
PORT0
MUX
12
0
1
/INT0
Figure 17.1. T0 Mode 0 Block Diagram
X
X
0
1
CKCON
M
T
2
1
0
M
T
1
Disabled
Enabled
Disabled
Enabled
M
T
0
Counter/Timer
G
A
T
E
1
Rev. 1.6
C
T
1
/
M
T
1
1
TMOD
M
T
1
0
TCLK
G
A
T
E
0
C
T
0
/
M
T
0
1
M
T
0
0
(5 bits)
TL0
(8 bits)
TH0
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
Interrupt

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