C8051F330-TB Silicon Laboratories Inc, C8051F330-TB Datasheet - Page 168
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C8051F330-TB
Manufacturer Part Number
C8051F330-TB
Description
BOARD PROTOTYPING W/C8051F330
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F330-TB
Contents
Board
Processor To Be Evaluated
C8051F33x
Interface Type
RS-232, UART
Operating Supply Voltage
7 V to 15 V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F330
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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C8051F330/1/2/3/4/5
172
Bits 7 – 0: SPI0DAT: SPI0 Transmit and Receive Data.
Bits 7 – 0: SCR7 – SCR0: SPI0 Clock Rate.
Example: If SYSCLK = 2 MHz and SPI0CKR = 0x04,
f
SCK
SCR7
f
R/W
Bit7
SCK
R/W
Bit7
=
=
The SPI0DAT register is used to transmit and receive SPI0 data. Writing data to SPI0DAT
places the data into the transmit buffer and initiates a transfer when in Master Mode. A read
of SPI0DAT returns the contents of the receive buffer.
These bits determine the frequency of the SCK output when the SPI0 module is configured
for master mode operation. The SCK clock frequency is a divided version of the system
clock, and is given in the following equation, where SYSCLK is the system clock frequency
and SPI0CKR is the 8-bit value held in the SPI0CKR register.
for 0 <= SPI0CKR <= 255
200kHz
f
SCK
------------------------- -
2
2000000
SCR6
R/W
Bit6
R/W
Bit6
=
4
+
------------------------------------------------ -
2
SFR Definition 17.3. SPI0CKR: SPI0 Clock Rate
1
SFR Definition 17.4. SPI0DAT: SPI0 Data
SPI0CKR
SCR5
SYSCLK
R/W
Bit5
R/W
Bit5
SCR4
+
R/W
Bit4
R/W
Bit4
1
Rev. 1.7
SCR3
R/W
Bit3
R/W
Bit3
SCR2
R/W
Bit2
R/W
Bit2
SCR1
R/W
Bit1
R/W
Bit1
SFR Address: 0xA3
SFR Address: 0xA2
SCR0
R/W
Bit0
R/W
Bit0
00000000
Reset Value
00000000
Reset Value
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