Z84C9000ZCO Zilog, Z84C9000ZCO Datasheet - Page 31

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Z84C9000ZCO

Manufacturer Part Number
Z84C9000ZCO
Description
KIO + Z84C01 DEVELOPMENT BOARD
Manufacturer
Zilog
Type
MPUr
Datasheet

Specifications of Z84C9000ZCO

Contents
Circuit Board, Software and Documentation
For Use With/related Products
Z84C90
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
PS011802-0902
Work Around:
This problem could happen under the following narrowly defined conditions:
This problem is not the case with the Z80 CPU. However, other CPUs could be affected.
One of the possible workarounds is to add the condition M1 not active to generate a CE
signal.
CE signal is active throughout the Interrupt Acknowledge cycle.
The address on the bus, A3–A0, is “110b”.
During this time, bit D3 is 1.
At the end of the Interrupt Acknowledge cycle, M1 goes inactive prior to the IORQ
signal.
At the time period of CE active, IORQ active, and M1 returns to the inactive state; all
during the rising edge of the clock.
KIO Serial/Parallel Counter Timer
Z84C90
26

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