M52223EVB Freescale Semiconductor, M52223EVB Datasheet - Page 21

BOARD EVAL FOR MCF52223

M52223EVB

Manufacturer Part Number
M52223EVB
Description
BOARD EVAL FOR MCF52223
Manufacturer
Freescale Semiconductor
Series
ColdFire®r
Type
MPUr
Datasheet

Specifications of M52223EVB

Contents
SBC, Cables and Software
Processor To Be Evaluated
MCF5222x
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
Coldfire
Core Sub-architecture
Coldfire V2
Silicon Core Number
MCF52
Silicon Family Name
MCF5222x
Rohs Compliant
Yes
For Use With/related Products
MCF52223
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1.3
Table 3
1.4
Table 4
1.5
Table 5
Freescale Semiconductor
Clock Mode Selection
Reset Configuration
describes signals used to reset the chip or as a reset indication.
describes signals used to support the on-chip clock generation circuitry.
describes signals used in mode selection;
External Clock In
Signal Name
Signal Name
Signal Name
Reset Out
Reset Signals
PLL and Clock Signals
Mode Selection
Clock Out
Reset In
Crystal
Test
CLKMOD[1:0]
00
00
01
10
10
11
Abbreviation
Abbreviation
CLKMOD[1:0] Selects the clock boot mode.
Abbreviation
CLKOUT
RSTO
EXTAL
RSTI
XTAL
RCON
XTAL
TEST
N/A
N/A
0
1
0
1
MCF52223 ColdFire Microcontroller, Rev. 2
Table 5. Mode Selection Signals
Primary reset input to the device. Asserting RSTI for at least 8 CPU
clock cycles immediately resets the CPU and peripherals.
Driven low for 1024 CPU clocks after the reset source has deasserted.
Table 4. PLL and Clock Signals
PLL disabled, clock driven by external oscillator
PLL disabled, clock driven by on-chip oscillator
PLL disabled, clock driven by crystal
PLL in normal mode, clock driven by external oscillator
PLL in normal mode, clock driven by on-chip oscillator
PLL in normal mode, clock driven by crystal
Crystal oscillator or external clock input except when the on-chip
relaxation oscillator is used.
Crystal oscillator output except when CLKMOD1=1, then sampled as
part of the clock mode selection mechanism.
This output signal reflects the internal system clock.
The Serial Flash Programming mode is entered by asserting the
RCON pin (with the TEST pin negated) as the chip comes out of
reset. During this mode, the EzPort has access to the flash memory
which can be programmed from an external device.
Reserved for factory testing only and in normal modes of operation
should be connected to VSS to prevent unintentional activation of
test functions.
Table 6. Clocking Modes
Table 6
Table 3. Reset Signals
describes the particular clocking modes.
Configure the clock mode.
Function
Function
Function
MCF52223 Family Configurations
I/O
I/O
I/O
O
O
O
I
I
I
I
21

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