SKP38602 Renesas Electronics America, SKP38602 Datasheet - Page 6

• Manufacturer Part Number: SKP38602
• Description: KIT STARTER FOR H8/38602
• Manufacturer: Renesas Electronics America
• Series: H8®r
• Type: MCUr

Specifications of SKP38602

• Contents: SKP Board, In-Circuit Debugger/Programmer, Target Cable, USB Cable and SKP CD-ROM
• For Use With/related Products: H8/38602
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

H8
Powerful Data Path
Management
H8 products are fully optimized system
solutions, so besides powerful CPU core
processing, H8 MCUs have advanced
data path management.
There are three types of data movement
engines: System DMA, External DMA
and Data Transfer Controller. The
Advanced
manages complex data and control
across the multiple-bus architecture.
The H8S and H8SX MCU architectures
use 3 separate buses. Data movement on
the External Bus and System Bus can
operate in parallel, greatly increasing
system performance by optimizing
operation per clock cycle.
• Renesas, the world’s
• Wide range of sizes
• Fastest flash write
• Access as fast as
• Up to -40°C to +125°C range
• Multiple user-friendly
Renesas is the #1 Flash MCU Supplier
#1 supplier of flash,
has shipped over
1 billion flash MCUs
of highly reliable
F-ZTAT (flash) up
to 1MB, in 0.18µm
process
time: 2.5 sec./ 128KB
for 0.18µm process
10ns @ 100MHz
modes for programming/
reprogramming flash memory
®
Family of Microcontrollers
Bus
System
Flash Memory Roadmap
Memory Structure
Next-Generation Non-volatile Memory
- MRAM
- PRAM (Phase Change RAM)
MONOS-type FLASH
(MONOS = Metal Oxide
Nitride Oxide Silicon)
Stacked-type
(NOR) Flash HND
Controller
• User mode allows flash to be
• Boot mode allows in-system
• USB devices can be optionally
programmed or erased by user
application software
programming using RS-232
serial port
programmed via the USB port
NOR
Serial Transfers using DMA only
Parallel Transfers using DMA + EXDMA
MONOS
80MHz
A1
A1
Flash
ROM
INTC
50 MHz
(200 - 180nm)
2004 2005 2006 2007
B1
B1
A2
NOR
transferring data between an external device and the MCU
(yellow). This parallel operation reduces time for operation.
MONOS
(180nm)
“A” Transfers
Bus Bridge
H8S CPU
80MHz
I/O Ports
100MHz
A3
B2
A2
This example shows system operation (red) using the
80MHz
NOR
System DMA, while in parallel the External DMA is
Peripheral Bus
80MHz
(150nm)
(150nm)
B2
Time Saved
MONOS
(130nm)
100MHz
RAM
DMA
(4ch)
2008 2009 2010 2011 2012 2013 2014
A3
• User Boot mode allows storing
• Write mode enables MCU
• Flash can be programmed via
Internal Bus
a custom flash update routine
in a special protected area
programming with desktop
or production programmers
the on-chip debug emulator
New
NVM
(90nm)
Parallel operation made possible
by using DMA + EXDMA allows
more data transfers in a given
length of time for increased
system throughput
133MHz
All Flash memory accesses are
need for pre-fetch operations.
(Full Speed)
single cycle, eliminating the
MRAM
EXDMA
DTC
BSC
NVM
New
(65nm)
166MHz
“B” Transfers
(45nm)
4