C8051T606DK Silicon Laboratories Inc, C8051T606DK Datasheet - Page 70

• Manufacturer Part Number: C8051T606DK
• Description: KIT DEVELOPMENT FOR C8051T606
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051T606DK

• Contents: Board, Adapter, Cable, CD, Power Supply
• Processor To Be Evaluated: C8051T606x
• Interface Type: RS-232, USB
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: C8051T606
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1666

C8051T600/1/2/3/4/5/6
70
Notes on Registers, Operands and Addressing Modes:
Rn - Register R0–R7 of the currently selected register bank.
@Ri - Data RAM location addressed indirectly through R0 or R1.
rel - 8-bit, signed (twos complement) offset relative to the first byte of the following instruction. Used by
SJMP and all conditional jumps.
direct - 8-bit internal data location’s address. This could be a direct-access Data RAM location (0x00–
0x7F) or an SFR (0x80–0xFF).
#data - 8-bit constant
#data16 - 16-bit constant
bit - Direct-accessed bit in Data RAM or SFR
addr11 - 11-bit destination address used by ACALL and AJMP. The destination must be within the same
2 kB page of program memory as the first byte of the following instruction.
addr16 - 16-bit destination address used by LCALL and LJMP. The destination may be anywhere within
the 8 kB program memory space.
There is one unused opcode (0xA5) that performs the same function as NOP.
All mnemonics copyrighted © Intel Corporation 1980.
Rev. 1.2