DEMO9S08LL16 Freescale Semiconductor, DEMO9S08LL16 Datasheet - Page 12
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DEMO9S08LL16
Manufacturer Part Number
DEMO9S08LL16
Description
BOARD DEMO FOR MC9S08LL16 MCU
Manufacturer
Freescale Semiconductor
Series
HCS08r
Type
MCUr
Datasheets
1.DEMO9S08LL16.pdf
(44 pages)
2.DEMO9S08LL16.pdf
(15 pages)
3.DEMO9S08LL16.pdf
(8 pages)
4.DEMO9S08LL16.pdf
(2 pages)
Specifications of DEMO9S08LL16
Contents
Board, Cable, DVD
Silicon Manufacturer
Freescale
Core Architecture
HCS08
Core Sub-architecture
HCS08
Silicon Core Number
MC9S08
Silicon Family Name
S08LL
Kit Contents
Board
Rohs Compliant
Yes
For Use With/related Products
MC9S08LL16
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DEMO9S08LL16
Manufacturer:
ALL
Quantity:
80
Electrical Characteristics
where K is a constant pertaining to the particular part. K can be determined from equation 3 by measuring
P
solving
3.5
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early
CMOS circuits, normal handling precautions should be taken to avoid exposure to static discharge.
Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels
of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade
Integrated Circuits. During the device qualification, ESD stresses were performed for the human body
model (HBM), the machine model (MM) and the charge device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless instructed otherwise in the device
specification.
12
D
(at equilibrium) for a known T
Equation 3-1
ESD Protection and Latch-Up Immunity
1
Body Model
Latch-up
Parameter is achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted.
Charge
Model
Human
Device
Model
No.
1
2
3
and
Series resistance
Storage capacitance
Number of pulses per pin
Series resistance
Storage capacitance
Number of pulses per pin
Minimum input voltage limit
Maximum input voltage limit
Human body model (HBM)
Charge device model (CDM)
Latch-up current at T
Equation 3-2
Table 7. ESD and Latch-Up Protection Characteristics
Table 6. ESD and Latch-up Test Conditions
Description
MC9S08LL16 Series MCU Data Sheet, Rev. 6
Rating
A
. Using this value of K, the values of P
iteratively for any value of T
1
A
= 85C
Symbol
Symbol
V
V
I
R1
R1
HBM
CDM
LAT
—
—
C
C
2000
500
100
Min
A
.
Value
1500
–2.5
100
200
7.5
D
3
0
3
and T
Max
—
—
—
J
can be obtained by
Freescale Semiconductor
Unit
Unit
mA
pF
pF
V
V
V
V