MAX6660EVSYS Maxim Integrated Products, MAX6660EVSYS Datasheet - Page 15
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MAX6660EVSYS
Manufacturer Part Number
MAX6660EVSYS
Description
EVAL KIT FOR MAX6660
Manufacturer
Maxim Integrated Products
Specifications of MAX6660EVSYS
Sensor Type
Temperature, Fan Controller
Sensing Range
-40°C ~ 125°C
Interface
SMBus (2-Wire/I²C)
Sensitivity
±1°C
Voltage - Supply
3 V ~ 5.5 V
Embedded
No
Utilized Ic / Part
MAX6660
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
to 16s and stores the data in an update register
(UPDATE). This enables control over timing of the ther-
mal feedback loop to optimize stability.
The Fan Threshold (T
from the UPDATE register value. If UPDATE exceeds
T
register (Table 9) stores the excess temperature in the
form of a 7-bit word with an LSB of 0.5°C for bits 4–0,
with bit 5 = 16°C. If the difference between the T
and UPDATE registers is higher than 32°C, then bit 6 is
set to 1, along with bits 5–1. In thermal closed loop, the
Fan Speed Control register is READ ONLY.
The Fan Gain (FG) register (Table 10) determines the
number of bits used in the Fan-Speed Control register.
This gain can be set to 4, 5, or 6. If bits 6 and 5 are set
to 10, all 6 bits of TEMPDATA are used directly to pro-
gram the speed of the fan so that the thermal loop has
a control range of +32°C with 64 temperature steps
Table 9. Fan-Speed Control Register (RFSC/W FSC)
Note: In thermal closed-loop mode, the fan DAC is read only and contains the difference between the measured temperature and
Table 8. Fan Conversion Update Rate
FAN
DATA
00h
01h
02h
03h
04h
05h
06h
REGISTER/
COMMAND
ADDRESS
POR State
temperature, then the Fan-Speed Control (FSC)
the fan threshold temperature. The LSB is 0.5°C and bit 5 is 16°C. If the difference is higher than 32°C, then bit 6 is set to 1,
together with bits 5–0. Bit 6 can be regarded as an overflow bit for differences higher than 32°C. Bit 7 is always zero. The FSC
register can be programmed directly in thermal open mode. In fan closed-loop mode, FSC programs fan speed with accept-
able values from 0 to 10h, when FG is set to 4 bits or 20h when FG is set to 5 bits, or 3F when FG is set to 6 bits. In fan open-
loop mode, FSC programs fan voltage with acceptable values from 0 to 64 (40h). For example, in fan closed-loop mode, zero
corresponds to zero fan speed and 10h corresponds to 100% fan speed. In fan open-loop mode, zero corresponds to zero
volts out and 40h corresponds to full fan voltage (11.3V typ).
Bit
00000000
00000001
00000010
00000011
00000100
00000101
00000110
BINARY
Fan-Speed Regulator with SMBus Interface
Remote-Junction Temperature-Controlled
______________________________________________________________________________________
FAN
N/A
RATE (Hz)
7
0
UPDATE
0.0625
) register value is subtracted
0.125
FAN
0.25
0.5
1
2
4
Overflow Bit
6
0
BETWEEN
SECONDS
UPDATES
4 (POR)
0.25
0.5
16
8
2
1
(MSB)
5
0
FAN
READ/WRITE FAN DAC REGISTER
FSC (15h = READ, 1Ah = WRITE)
from fan off to full fan speed. If bits 6 and 5 are set to
01, the thermal control loop has a control range of 16°C
with 32 temperature steps from fan off to full fan speed.
If bits 6 and 5 are set to 00, the thermal control loop
has a control range of 8°C with 16 temperature steps
from fan off to full fan speed.
Setting bit 3 of the Configuration register (Table 5) to 1
places the MAX6660 in thermal open loop. In thermal
open-loop mode, the FSC register is read/write and con-
tains the 7-bit result of UPDATE subtracted from T
In fan open loop, the FSC register programs fan voltage
with acceptable values from 0 to 64 (40h). For example,
in fan open-loop mode, 0 corresponds to zero output
and 40h corresponds to full fan voltage, for example
(11.3V, typ). Proportional control is available over the 0
to 63 (3Fh) range with 64 (40h) forcing unconditional
full speed. In fan closed-loop mode, 0 corresponds to
zero fan speed and 10h corresponds to 100% fan
speed, when the FG register is set to 4 bits, 20h at 5
bits, and 3Fh at 6 bits.
The fan controller (Figure 7) is based on an up/down
counter where there is a reference clock representing
the desired fan speed counting up, while tachometer
pulses count down. The reference clock frequency is
divided down from the MAX6660 internal clock to a fre-
quency of 8415Hz. This clock frequency is further
divided by the Fan Full-Scale (FS) register (Table 11),
which is limited to values between 127 to 255, for a
Data
4
0
Data
3
0
Data
2
0
Thermal Open Loop
Data
1
0
Fan Loop
Data
FAN
0
0
.
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