LM95245EB/NOPB National Semiconductor, LM95245EB/NOPB Datasheet - Page 10

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LM95245EB/NOPB

Manufacturer Part Number
LM95245EB/NOPB
Description
BOARD EVALUATION FOR LM95245
Manufacturer
National Semiconductor
Series
PowerWise®, TruTherm®r
Datasheets

Specifications of LM95245EB/NOPB

Sensor Type
Temperature
Sensing Range
-40°C ~ 125°C
Interface
SMBus (2-Wire/I²C)
Sensitivity
±1°C
Voltage - Supply
3 V ~ 3.6 V
Embedded
No
Utilized Ic / Part
LM95245
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LM95245EB
www.national.com
9.
10. Configuration Register 2 defaults to 1Fh. This sets the
1.3 SMBus INTERFACE
The LM95245 operates as a slave on the SMBus, so the
SMBCLK line is an input and the SMBDAT line is bidirectional.
The LM95245 never drives the SMBCLK line and it does not
support clock stretching. According to SMBus specifications,
the LM95245 has a 7-bit slave address. Three SMBus ad-
dresses can be selected by connecting pin 6 (A0) to either
Low, Mid-Supply or High voltages. The address selection ta-
ble below shows two sets of possible selections for the
LM95245CIMM and the LM95245CIMM-1.
The OS/A0 pin, after power-up, defaults as an address select
input pin (A0). After power-up, the OS/A0 pin can only be
programmed as an OS output when it is in the “High” state.
Therefore, 4Ch is the only valid slave address that can be
used when the OS/A0 pin is programmed to function as an
OS output. When the OS/A0 pin is programmed to function
as an A0 input the LM95245 will immediately detect the state
of this pin to determine its SMBus slave address. The
LM95245 does not latch the state of the A0 pin when it is
functioning as an input. If the OS/A0 pin is not used it must
be externally connected through hardware to some state, as
shown in the table, in order to guarantee that the proper ad-
dress is selected and not in an indeterminate state. The OS/
A0 does not have an internal pull-up.
1.4 DIGITAL FILTER
In order to suppress erroneous remote temperature readings
due to noise, the LM95245 incorporates a digital filter for the
Remote Temperature Channel. The filter is accessed in the
Configuration Register 2, bits D2 (FE1) and D1(FE0). The fil-
ter can be set according to the following table.
State of the A0
Mid-Supply
Configuration Register 1 defaults to 00h. This sets the
LM95245 as follows:
A.
B.
LM95245 as follows:
A.
B.
C. Diode Fault Mask bit for TCRIT defaults to 1.
D. Diode Fault Mask bit for OS defaults to 0.
E.
High
Low
Pin
The STOP/RUN defaults to the active/converting
mode.
The Local and Remote TCRIT and OS Masks are
reset to 0.
Remote Diode digital filter defaults on.
The Remote Diode mode defaults to a typical Intel
processor on 45/65/90 nm process.
Pin 6 Function defaults to Address Input function
(A0).
HEX
LM95245CIMM
SMBus Device
4C
18
29
Address
001 1000
010 1001
100 1100
Binary
LM95245CIMM-1
SMBus Device
HEX
4D
19
29
Address
Binary
1001
1001
1100
001
010
100
10
Figure 2 depicts the filter output in response to a step input
and an impulse input.
b) Impulse response with input transients less than 4°C
FIGURE 2. Filter Impulse and Step Response Curves
a) Seventeen and fifty degree step response
c) Impuse response with input transients
FE1
0
0
1
1
greater than 4°C
FE0
0
1
0
1
Filter Setting
Reserved
Reserved
Filter Off
Filter On
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