LM95231EVAL National Semiconductor, LM95231EVAL Datasheet - Page 19

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LM95231EVAL

Manufacturer Part Number
LM95231EVAL
Description
BOARD EVALUATION LM95231
Manufacturer
National Semiconductor
Series
TruTherm®r
Datasheets

Specifications of LM95231EVAL

Sensor Type
Temperature
Sensing Range
0°C ~ 125°C
Interface
SMBus (2-Wire/I²C)
Sensitivity
±1°C
Voltage - Supply
3 V ~ 3.6 V
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
LM95231
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
3.0 Applications Hints
supporting the MMBT3904 transistor and the Pentium 4
processor on 90nm process without the requirement for
additional trims. For most accurate measurements TruTherm
mode should be turned on when measuring the Pentium 4
processor on the 90nm process to minimize the error intro-
duced by the false non-ideality spread (see Section 3.1.1
Diode Non-Ideality Factor Effect on Accuracy). When a tem-
perature sensor calibrated for a particular processor type is
used with a different processor type, additional errors are
introduced.
Temperature errors associated with non-ideality of different
processor types may be reduced in a specific temperature
range of concern through use of software calibration. Typical
Non-ideality specification differences cause a gain variation
of the transfer function, therefore the center of the tempera-
ture range of interest should be the target temperature for
calibration purposes. The following equation can be used to
calculate the temperature correction factor (T
compensate for a target non-ideality differing from that sup-
ported by the LM95231.
where
The correction factor of Equation (7) should be directly
added to the temperature reading produced by the
LM95231. For example when using the LM95231, with the
3904 mode selected, to measure a AMD Athlon processor,
with a typical non-ideality of 1.008, for a temperature range
of 60 ˚C to 100 ˚C the correction factor would calculate to:
Therefore, 1.75˚C should be subtracted from the tempera-
ture readings of the LM95231 to compensate for the differing
typical non-ideality target.
3.2 PCB LAYOUT FOR MINIMIZING NOISE
In a noisy environment, such as a processor mother board,
layout considerations are very critical. Noise induced on
traces running between the remote temperature diode sen-
sor and the LM95231 can cause temperature conversion
errors. Keep in mind that the signal level the LM95231 is
trying to measure is in microvolts. The following guidelines
should be followed:
• η
• η
• T
S
T
CR
T
= target thermal diode typical non-ideality
= LM95231 non-ideality for accuracy specification
CF
T
= center of the temperature range of interest in ˚C
CF
=[(1.003−1.008)÷1.003]x(80+273) =−1.75˚C
FIGURE 4. Ideal Diode Trace Layout
= [(η
S
−η
Processor
) ÷ η
S
] x (T
(Continued)
CR
+ 273 K)
CF
) required to
20120217
(7)
19
1. V
2. A 100pF diode bypass capacitor is recommended to
3. Ideally, the LM95231 should be placed within 10cm of
4. Diode traces should be surrounded by a GND guard ring
5. Avoid routing diode traces in close proximity to power
6. Avoid running diode traces close to or parallel to high
7. If it is necessary to cross high speed digital traces, the
8. The ideal place to connect the LM95231’s GND pin is as
9. Leakage current between D+ and GND and between D+
Noise coupling into the digital lines greater than 400mVp-p
(typical hysteresis) and undershoot less than 500mV below
GND, may prevent successful SMBus communication with
the LM95231. SMBus no acknowledge is the most common
symptom, causing unnecessary traffic on the bus. Although
the SMBus maximum frequency of communication is rather
low (100kHz max), care still needs to be taken to ensure
proper termination within a system with multiple parts on the
bus and long printed circuit board traces. An RC lowpass
filter with a 3db corner frequency of about 40MHz is included
on the LM95231’s SMBCLK input. Additional resistance can
be added in series with the SMBDAT and SMBCLK lines to
further help filter noise and ringing. Minimize noise coupling
by keeping digital traces out of switching power supply areas
as well as ensuring that digital lines containing high speed
data communications cross at right angles to the SMBDAT
and SMBCLK lines.
allel with 100pF. The 100pF capacitor should be placed
as close as possible to the power supply pin. A bulk
capacitance of approximately 10µF needs to be in the
near vicinity of the LM95231.
filter high frequency noise but may not be necessary.
Make sure the traces to the 100pF capacitor are
matched. Place the filter capacitors close to the
LM95231 pins.
the Processor diode pins with the traces being as
straight, short and identical as possible. Trace resis-
tance of 1Ω can cause as much as 0.62˚C of error. This
error can be compensated by using simple software
offset compensation.
to either side, above and below if possible. This GND
guard should not be between the D+ and D− lines. In the
event that noise does couple to the diode lines it would
be ideal if it is coupled common mode. That is equally to
the D+ and D− lines.
supply switching or filtering inductors.
speed digital and bus lines. Diode traces should be kept
at least 2cm apart from the high speed digital traces.
diode traces and the high speed digital traces should
cross at a 90 degree angle.
close as possible to the Processors GND associated
with the sense diode.
and D− should be kept to a minimum. Thirteen nano-
amperes of leakage can cause as much as 0.2˚C of
error in the diode temperature reading. Keeping the
printed circuit board as clean as possible will minimize
leakage current.
DD
should be bypassed with a 0.1µF capacitor in par-
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