Introduction
The ISL2828xEVAL1Z evaluation board is a design platform
containing all the circuitry needed to characterize critical
performance parameters of the ISL28286 and ISL28288
dual operational amplifiers, using a variety of user defined
test circuits.
The ISL2828x amplifiers feature low noise, low distortion,
and rail-to-rail output drive capability. They are designed to
operate with single and dual supplies from +5VDC
(±2.5VDC) down to +2.4VDC (±1.2VDC).
Reference Documents
• ISL28286 Data Sheet, FN6312
• ISL28288 Data Sheet, FN6339
Evaluation Board Key Features
The ISL2828xEVAL1Z is designed to enable the IC to
operate from a single supply (+2.4VDC to +5VDC), or from
split supplies (±1.2VDC to ±2.5V). The board is configured
for 2 independent op amps connected for differential input
with a closed loop gain of 10. A single external reference
voltage (VREF) pin and provisions for a user-selectable
voltage divider (filter is included).
Power Supplies
External power connections are made through the V+, V-
and Ground connections on the evaluation board. For single
supply operation, the V- and Ground pins are tied together to
the power supply negative terminal. For split supplies V+
and V- terminals connect to their respective power supply
terminals. De-coupling capacitors C
ground through R
VCM
IN-
IN+
1
, R
VREF
46
(Figure 1)
, 0Ω resistors. Resistors R
IN(A, B)+
®
IN(A, B)-
VREF
GND
1
ISL2828xEVAL1Z Evaluation Board User’s Guide
12
Application Note
, C
17
FIGURE 2. BASIC AMPLIFIER CONFIGURATION
, connect to
0Ω
10kΩ
10kΩ
RIN-
RIN+
40
and
1-888-INTERSIL or 1-888-468-3774
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
RREF(A,B)+
100kΩ
10kΩ
IN-
IN+
+
+
-
0Ω
R
additional power supply filtering, or to reduce the voltage
rate-of-rise to less than ±1V/µs. Two additional capacitors,
C
high frequency noise. Anti-reverse diodes D
diode D
reversal.
Amplifier Configuration
The schematic of each of the 2 op amps with the
components supplied is shown in Figure 2. The circuit
implements a differential input amp with a closed loop gain of
10. The circuit can operate from a single 2.4VDC to +5VDC
supply, or from dual supplies from ±1.2VDC to ±2.5VDC.
The VREF pin can be connected to ground to establish a
ground referenced input for split supply operation, or can be
externally set to any reference level for single supply
operation.
100kΩ
RF
49
10
are 0Ω but can be changed by the user to provide
and C
0.1μF
C10
C10
August 2, 2007
V+
3
VP
V-
VM
V-
All other trademarks mentioned are the property of their respective owners.
protect the circuit in the case of accidental polarity
R40 0
VM
TO OTHER CHANNEL
18
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
FIGURE 1. POWER SUPPLY CIRCUIT
J3
, are connected close to the part to filter out
4.7μF
4.7UF
C12
C12
+
1/2 ISL2828x
Copyright Intersil Americas Inc. 2007. All Rights Reserved
D2
D2
R46
R46
0Ω
0
0
1
1
2
MMBZ52xxB
J2
NC
A
NC
A
D3
D3
R1
R1
0
0
C
C
(Figure 2)
D1
3
D1
3
10kΩ
2
DNP
C16
C16
4.7μF
4.7UF
C17
C17
+
+
R49
1
1
, D
J1
VOUT(x)
AN1344.0
VP
0
2
and zener
V+
V+
0.1UF
0.1μF
C18
C18