Introduction
The ISL2819xEVAL1Z evaluation board is a design platform
containing all the circuitry needed to characterize critical
performance parameters of the ISL28190 and ISL28191
single operational amplifiers, using a variety of user defined
test circuits.
The ISL28190 and ISL28191 amplifiers feature ultra-low
noise, ultra-low distortion, and rail-to-rail output drive
capability. They are designed to operate with single and dual
supplies from +5.5VDC (±2.75VDC) down to +3VDC
(±1.5VDC).
Reference Documents
• ISL28190 Data Sheet, FN6247
• ISL28191 Data Sheet, FN6156
Evaluation Board Key Features
The ISL2819xEVAL1Z is designed to enable the IC to
operate from a single supply (+3VDC to +5.5VDC), or from
split supplies (±1.5VDC to ±2.75V). The board is configured
for a single op amps connected for differential input with a
closed loop gain of 10. A single external reference voltage
(VREF) pin and provisions for a user-selectable voltage
divider (filter is included).
Power Supplies
External power connections are made through the V+, V-
and Ground connections on the evaluation board. For single
supply operation, the V- and Ground pins are tied together to
the power supply negative terminal. For split supplies V+
and V- terminals connect to their respective power supply
terminals. De-coupling capacitors C
ground through R
VCM
IN-
IN+
1
and R
VREF
(Figure 1)
21
®
VREF
0Ω resistors. Resistors R
GND
IN +
1
IN -
ISL2819xEVAL1Z Evaluation Board User’s Guide
1
Application Note
andC
FIGURE 2. BASIC AMPLIFIER CONFIGURATION
2
0Ω
connect to
499Ω
499Ω
RIN-
RIN+
20
1-888-INTERSIL or 1-888-468-3774
and
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
RREF+
4.99kΩ
10kΩ
IN-
IN+
+
+
-
R
additional power supply filtering, or to reduce the voltage
rate-of-rise to less than ±1V/µs. Two additional capacitors,
C
frequency noise. Anti-reverse diodes D
circuit in the case of accidental polarity reversal.
Amplifier Configuration
The schematic of the op amp with the components supplied
is shown in Figure 2. The circuit implements a differential
input amp with a closed loop gain of 10. The circuit can
operate from a single 3VDC to +5.5VDC supply, or from dual
supplies from ±1.5VDC to ±2.75VDC. The VREF pin can be
connected to ground to establish a ground referenced input
for split supply operation, or can be externally set to any
reference level for single supply operation.
4.99kΩ
RF
24
3
and C
are 0Ω but can be changed by the user to provide
0.1µF
C4
VM
August 6, 2007
V+
VP
V-
V-
All other trademarks mentioned are the property of their respective owners.
4
|
are connected close to the part to filter out high
Intersil (and design) is a registered trademark of Intersil Americas Inc.
FIGURE 1. POWER SUPPLY CIRCUIT
VM
4.7µF
C2
+
ISL2819x
Copyright Intersil Americas Inc. 2007. All Rights Reserved
D2
R21
0Ω
50Ω
R1
0Ω
(Figure 2)
D1
1
4.7µF
C1
and D
+
VOUT
2
AN1348.0
VP
protect the
V+
0.1µF
C3