EVAL-AD8003-3CPEZ Analog Devices Inc, EVAL-AD8003-3CPEZ Datasheet - Page 5

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EVAL-AD8003-3CPEZ

Manufacturer Part Number
EVAL-AD8003-3CPEZ
Description
BOARD EVALUATION AD8003-3CPEZ
Manufacturer
Analog Devices Inc
Datasheet

Specifications of EVAL-AD8003-3CPEZ

Channels Per Ic
3 - Triple
Amplifier Type
Current Feedback
Output Type
Single-Ended
Slew Rate
3800 V/µs
-3db Bandwidth
1.65GHz
Current - Output / Channel
100mA
Operating Temperature
-40°C ~ 85°C
Current - Supply (main Ic)
9.5mA
Voltage - Supply, Single/dual (±)
4.5 V ~ 10 V, ±2.25 V ~ 5 V
Board Type
Fully Populated
Utilized Ic / Part
AD8003
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
Power Dissipation
Common-Mode Input Voltage
Differential Input Voltage
Exposed Paddle Voltage
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering 10 sec)
Junction Temperature
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
for device soldered in circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
24-Lead LFCSP_VQ
Maximum Power Dissipation
The maximum safe power dissipation for the AD8003 is limited
by the associated rise in junction temperature (T
approximately 150°C, which is the glass transition temperature,
the plastic changes its properties. Even temporarily exceeding
this temperature limit may change the stresses that the package
exerts on the die, permanently shifting the parametric performance
of the AD8003. Exceeding a junction temperature of 175°C for
an extended period can result in changes in silicon devices,
potentially causing degradation or loss of functionality.
The power dissipated in the package (P
quiescent power dissipation and the power dissipated in the die
due to the AD8003 drive at the output. The quiescent power is
the voltage between the supply pins (V
current (I
JA
is specified for the worst-case conditions, that is, θ
P
P
D
D
= Quiescent Power + (Total Drive Power – Load Power)
=
S
).
(
V
S
×
I
S
)
+
V
2
S
×
V
R
OUT
L
V
θ
70
OUT
R
S
JA
D
) times the quiescent
Rating
11 V
See Figure 3
−V
±V
−V
−65°C to +125°C
−40°C to +85°C
300°C
150°C
) is the sum of the
L
2
S
S
S
− 0.7 V to +V
J
) on the die. At
Unit
°C/W
JA
is specified
S
+ 0.7 V
Rev. B | Page 5 of 16
RMS output voltages should be considered. If R
−V
I
worst case, when V
In single-supply operation with R
is V
Airflow increases heat dissipation, effectively reducing θ
In addition, more metal directly in contact with the package
leads and exposed paddle from metal traces, through holes,
ground, and power planes reduce θ
Figure 3 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the exposed paddle,
4 mm × 4 mm LFCSP_VQ (70°C/W) package on a JEDEC
standard 4-layer board. θ
ESD CAUTION
OUT
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
S
, as in single-supply operation, the total drive power is V
. If the rms signal levels are indeterminate, consider the
OUT
P
D
3.0
2.5
2.0
1.5
1.0
0.5
= V
0
=
–55
(
V
S
/2.
S
×
–35
I
S
)
OUT
+
–15
(
V
AMBIENT TEMPERATURE (°C)
= V
S
R
/
JA
L
4
5
S
)
values are approximations.
/4 for R
2
25
L
referenced to − V
L
JA
45
to midsupply.
.
65
85
L
is referenced to
105
S
AD8003
, worst case
125
JA
.
S
×

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