LP38852EVAL National Semiconductor, LP38852EVAL Datasheet

LP38852EVAL

Manufacturer Part Number

LP38852EVAL

Description

BOARD EVALUATION LP38852

Manufacturer

National Semiconductor

Series

PowerWise®r

Datasheets

1.LP38852EVAL.pdf (18 pages)

2.LP38852EVAL.pdf (6 pages)

Specifications of LP38852EVAL

Channels Per Ic

1 - Single

Voltage - Output

1.2V

Current - Output

1.5A

Voltage - Input

3 ~ 5.5V

Regulator Type

Positive Adjustable

Operating Temperature

-40°C ~ 125°C

Board Type

Fully Populated

Utilized Ic / Part

LP38852

Lead Free Status / RoHS Status

Contains lead / RoHS non-compliant

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LP38852MR-ADJ Evaluation

Board

Introduction

This board is designed to allow the evaluation of the

LP38852MR-ADJ Voltage Regulator. Each board is assem-

bled and tested in the factory. This evaluation board has the

PSOP-8 package mounted, and the output voltage is set to

1.20V.

General Description

The LP38852 is a dual-rail adjustable LDO linear regulator

capable of suppling up to 1.5A of output current, and incor-

porates an Enable function as well as a Soft-Start function.

The device has been designed to work with 10 µF input and

output ceramic capacitors, and 1µF bias capacitor. Footprints

areas for C

Operation

The input voltage, applied between V

at least 1.0V greater than V

plied V

The bias voltage, applied between V

above the minimum bias voltage of 3.0V, and no more than

the maximum of 5.5V.

Loads can be connected to V

accurate measurements directly onto the input and output

pins of the device, eliminating any voltage drop on the PCB

traces or connecting wires to the load.

Setting V

The output voltage is set using the external resistive divider

R1 and R2. The output voltage is given by the formula:

It is recommended that the values selected for R1 and R2 are

such that the parallel value is less than 10 kΩ. This is to pre-

vent internal parasitic capacitances on the ADJ pin from

interfering with the F

The LP38852MR-ADJ Evaluation board is assembled with a

1.40 kΩ ±1% resistor for R1, and a 1.00 kΩ ±1% resistor for

R2. This sets V

Selecting C

A capacitor placed across the gain resistor R1 will provide

additional phase margin to improve load transient response

of the device. This capacitor, C

a zero in the loop response given by the formula:

The value for C

OUT

) between 10 kHz and 15 kHz using the formula:

and V

BIAS

voltage.

and C

test points are provided on the board to allow

OUT

= (1 / (2 x π x C

should be selected to set a zero frequency

= V

to 1.20V.

OUT

ADJ

pole set by R1 and C

will allow for a variety of sizes.

x (1 + (R1 / R2))

OUT

and no greater than the ap-

, in parallel with R1, will form

with reference to GND.

x R1) )

BIAS

and GND, should be

and GND should be

300024

(1)

(2)

National Semiconductor

Application Note 1560

Don Jones

December 2006

The closest standard 10% value is usually adequate for C

The LP38853-ADJ Evaluation board is assembled with a 0.01

μF capacitor for C

Enable Function

ON/OFF control is provided by supplying a logic level signal

to the Enable pin. A minimum V

required at this pin to enable the LDO output. The LDO output

will be shutdown when the V

The V

teresis.

In applications were the LP38852 is operated continuously

the Enable pin can be connected directly to V

FIGURE 1. 10mA to 3A Load Transient Response

FIGURE 2. 1A to 3A Load Transient Response

threshold incorporates approximately 100mV of hys-

= 1 / (2 x π x F

. This sets F

value is typically 1.0V or less.

to approximately 11.4 kHz.

x R1)

value of 1.3V is typically

BIAS

www.national.com

30002407

30002408

, or left open.

(3)

Related parts for LP38852EVAL

LP38852EVAL Summary of contents

Page 1

... The value for C should be selected to set a zero frequency between 10 kHz and 15 kHz using the formula: Z © 2007 National Semiconductor Corporation National Semiconductor Application Note 1560 Don Jones December 2006 The closest standard 10% value is usually adequate for C The LP38853-ADJ Evaluation board is assembled with a 0.01 μ ...

Page 2

The Enable pin has a 200 kΩ internal resistor to V Enable pin is left open, care should be taken to minimize any capacitance on the Enable pin, as any capacitance will intro- duce an RC delay time on the ...

Page 3

Connection Diagram Schematic Diagram PCB Layout 30002403 Evaluation Board Schematic. Evaluation Board Component and Pin Layout 3 30002401 30002402 www.national.com ...

Page 4

... TP4 GND TP TP5 ADJ TP TP6 OUT TP7 TP BIAS www.national.com Description National Semiconductor LP38852MR-ADJ NOPB X7R; 1210 X7R; 0805 X7R; 1210 10V; X7R; 0805 10V; X7R; 0805 Terminal; White Terminal; Red Johnson Components Terminal; Black Terminal; Orange Terminal; Blue 250 mW; ±100 ppm; 0805 250 mW ...

Page 5

Notes 5 www.national.com ...

Page 6

... National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other brand or product names may be trademarks or registered trademarks of their respective holders. ...

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