LP38856-1.2EVAL National Semiconductor, LP38856-1.2EVAL Datasheet

LP38856-1.2EVAL

Manufacturer Part Number

LP38856-1.2EVAL

Description

BOARD EVALUATION LP38856-1.2

Manufacturer

National Semiconductor

Series

PowerWise®r

Datasheets

1.LP38856-1.2EVAL.pdf (14 pages)

2.LP38856-1.2EVAL.pdf (4 pages)

Specifications of LP38856-1.2EVAL

Channels Per Ic

1 - Single

Voltage - Output

1.2V

Current - Output

Voltage - Input

3 ~ 5.5V

Regulator Type

Positive Fixed

Operating Temperature

-40°C ~ 125°C

Board Type

Fully Populated

Utilized Ic / Part

LP38856

Lead Free Status / RoHS Status

Not applicable / Not applicable

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LP38856S-1.2 Evaluation

Board

Introduction

This board is designed to allow the evaluation of the

LP38856S-1.2 Voltage Regulator. Each board is assembled

and tested in the factory. This evaluation board has the

TO-263 5-lead package mounted.

General Description

The LP38856 is a dual-rail LDO linear regulator capable of

suppling up to 3A of output current, and incorporates an

Enable function

The device has been designed to work with 10 µF input and

output ceramic capacitors, and 1µF bias capacitors. Foot-

prints areas for C

Operation

The input voltage, applied between V

at least 1.0V greater than V

applied V

The bias voltage, applied between V

above the minimum bias voltage of 3.0V, and no higher than

the maximum of 5.5V.

Loads can be connected to V

accurate measurements directly on the evaluation board,

eliminating any voltage drop on the PCB traces or connect-

ing wires to the load.

ON/OFF control is provided by supplying a logic level signal

to the Enable pin. A minimum V

at this pin to enable the LDO output. The LDO output will be

shutdown when the V

threshold incorporates approximately 100mV of hysteresis.

Schematic Diagram

OUT

and V

BIAS

voltage.

test points are provided on the board to allow

and C

OUT

value is 1.0V or less. The V

will allow for a variety of sizes.

OUT

, and no higher than the

with reference to GND.

value of 1.3V is required

BIAS

and GND, should be

AN201935

and GND should be

Evaluation Board Schematic.

National Semiconductor

Application Note 1479

Don Jones

November 2006

In applications were the LP38856 is operated continuously

the Enable pin can be connected directly to V

open. The Enable pin has a 200 kΩ internal resistor to V

If the Enable pin is left open, care should be taken to

minimize any capacitance on the Enable pin, as any capaci-

tance will introduce an RC delay time on the Enable function.

Hardware

The schematic and layout of the evaluation board are given

below:

FIGURE 1. Enable Thresholds

20193501

www.national.com

20193505

BIAS

, or left

BIAS

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LP38856-1.2EVAL Summary of contents

Page 1

... LP38856S-1.2 Voltage Regulator. Each board is assembled and tested in the factory. This evaluation board has the TO-263 5-lead package mounted. General Description The LP38856 is a dual-rail LDO linear regulator capable of suppling output current, and incorporates an Enable function The device has been designed to work with 10 µF input and output ceramic capacitors, and 1µ ...

Page 2

... With the 37˚C/W thermal rating the LP38856S evaluation board will dissipate a maximum of 2.75W with T FIGURE 2. Maximum Power Dissipation vs Ambient Temperature www ...

Page 3

... LP38856S-1.2 NOPB Not Installed Not Installed Terminal - WHITE Terminal - RED Johnson Components Terminal - BLACK Terminal - ORANGE Terminal - BLUE Not Installed Not Installed Diameter = 0.062” 3 Part Number LP38856S-1.2 NOPB Corporation AVX 1210ZC106KAT2A AVX 0805ZC105KAT2A AVX 1210ZC106KAT2A — — — — 108-0901-001 108-0902-001 ...

Page 4

... National Semiconductor and the National Semiconductor logo are trademarks or registered trademarks of National Semiconductor Corporation. All other brand or product names may be trademarks or registered trademarks of their respective holders. ...

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