SOT89-3EV-VREG Microchip Technology, SOT89-3EV-VREG Datasheet - Page 10

BOARD EVAL SOT89-3 VOLTAGE REG

SOT89-3EV-VREG

Manufacturer Part Number
SOT89-3EV-VREG
Description
BOARD EVAL SOT89-3 VOLTAGE REG
Manufacturer
Microchip Technology

Specifications of SOT89-3EV-VREG

Channels Per Ic
1 - Single
Regulator Type
Positive Fixed
Board Type
Partially Populated
Utilized Ic / Part
SOT-89-3 Package
Silicon Manufacturer
Microchip
Application Sub Type
Voltage Regulator
Kit Application Type
Power Management - Voltage Regulator
Silicon Core Number
MCP1700A, MCP1701A, MCP1702, MCP1703
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output
-
Voltage - Output
-
Voltage - Input
-
Operating Temperature
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
MCP1703
3.0
The descriptions of the pins are listed in
TABLE 3-1:
3.1
Regulator ground. Tie GND to the negative side of the
output and the negative side of the input capacitor.
Only the LDO bias current (2.0 µA typical) flows out of
this pin; there is no high current. The LDO output
regulation is referenced to this pin. Minimize voltage
drops between this pin and the negative side of the
load.
3.2
Connect V
positive terminal of the output capacitor. The positive
side of the output capacitor should be physically
located as close to the LDO V
The current flowing out of this pin is equal to the DC
load current.
DS22049E-page 10
2, 3, 5, 6, 7
2x3 DFN-8
Pin No.
4
1
8
9
PIN DESCRIPTIONS
Ground Terminal (GND)
Regulated Output Voltage (V
OUT
to the positive side of the load and the
SOT-223-3
MCP1703 PIN FUNCTION TABLE
Pin No.
2,Tab
3
1
OUT
SOT-23A
Pin No.
pin as is practical.
1
2
3
Table
OUT
3-1.
SOT-89-3
Pin No.
2,Tab
)
1
3
Name
3.3
Connect V
Like all low dropout linear regulators, low source
impedance is necessary for the stable operation of the
LDO. The amount of capacitance required to ensure
low source impedance will depend on the proximity of
the input source capacitors or battery type. For most
applications, 1 µF of capacitance will ensure stable
operation of the LDO circuit. For applications that have
load currents below 100 mA, the input capacitance
requirement can be lowered. The type of capacitor
used can be ceramic, tantalum, or aluminum
electrolytic. The low ESR characteristics of the ceramic
will yield better noise and PSRR performance at
high-frequency.
3.4
There is an internal electrical connection between the
Exposed Thermal Pad (EP) and the V
be connected to the same potential on the Printed
Circuit Board (PCB).
V
GND
V
NC
EP
OUT
IN
Unregulated Input Voltage (V
Exposed Thermal Pad (EP)
Ground Terminal
Regulated Voltage Output
Unregulated Supply Voltage
No Connection
Exposed Thermal Pad (EP); must be
connected to VSS.
IN
to the input unregulated source voltage.
 2010 Microchip Technology Inc.
Function
SS
pin; they must
IN
)

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