AS1116 DB-BLUE austriamicrosystems, AS1116 DB-BLUE Datasheet - Page 14

• Manufacturer Part Number: AS1116 DB-BLUE
• Description: BOARD DEMO AS1116 BLUE
• Manufacturer: austriamicrosystems

Specifications of AS1116 DB-BLUE

• Current - Output / Channel: *
• Outputs And Type: 8, Non-Isolated
• Voltage - Output: *
• Features: 64 LED Driver with Error Detection, SPI
• Voltage - Input: 2.7 ~ 5.5 V
• Utilized Ic / Part: AS1116
• Lead Free Status / RoHS Status: Lead free by exemption / RoHS compliant by exemption

AS1116
Datasheet - D e t a i l e d D e s c r i p t i o n
Feature Register (0x0E)
The Feature Register is used for enabling various features including switching the device into external clock mode,
applying an external reset, selecting code-B or HEX decoding, enabling or disabling blinking, enabling or disabling the
SPI-compatible interface, setting the blinking rate, and resetting the blink timing.
Note: At power-up the Feature Register is initialized to 0.
Table 19. Feature Register Summary
Table 20. Feature Register Bit Descriptions (Address (HEX) = 0xXE)
No-Op Register (0xX0)
The No-Op Register is used when multiple AS1116 devices are cascaded in order to support displays with more than 8
digits. The cascading must be done in such a way that all SDO pins are connected to SDI of the next AS1116
ure 20 on page
For example, if five devices are cascaded, in order to perform a write operation to the fifth device, the write-command
must be followed by four no-operation commands. When the LD signal goes high, all shift registers are latched. The
first four devices will receive no-operation commands and only the fifth device will receive the intended operation com-
mand, and subsequently update its register.
www.austriamicrosystems.com/LED-Driver-ICs/AS1116
Bit
D0
D1
D2
D3
D4
D5
D6
D7
blink_
Addr: 0xXE
start
D7
blink_freq_sel
decode_sel
blink_start
Bit Name
blink_en
reg_res
clk_en
sync
NU
16). The LD and SCL signals are connected to all devices.
sync
D6
Feature Register
Enables and disables various device features.
Default
0
0
0
0
0
0
0
freq_sel
blink_
D5
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
External clock active.
0 = Internal oscillator is used for system clock.
1 = Pin CLK of the serial interface operates as system clock input.
Resets all control registers except the Feature Register.
0 = Reset Disabled. Normal operation.
1 = All control registers are reset to default state (except the Feature
Register) identically after power-up.
Note: The Digit Registers maintain their data.
Selects display decoding for the selected digits
0 = Enable Code-B decoding (see
1 = Enable HEX decoding (see
Not used
Enables blinking.
0 = Disable blinking. 1 = Enable blinking.
Sets blink with low frequency (with the internal oscillator enabled):
0 = Blink period typically is 1 second (0.5s on, 0.5s off).
1 = Blink period is 2 seconds (1s on, 1s off).
Synchronizes blinking on the rising edge of pin LD. The multiplex and
blink timing counter is cleared on the rising edge of pin LD. By setting
this bit in multiple devices, the blink timing can be synchronized across
all the devices.
Start Blinking with display enabled phase. When bit D4 (blink_en) is set,
bit D7 determines how blinking starts.
0 = Blinking starts with the display turned off.
1 = Blinking starts with the display turned on.
blink_en
D4
Revision 1.05
NU
D3
Bit Description
decode_sel
Table 11 on page
D2
Table 10 on page
reg_res
(Table 9 on page
D1
11).
11).
clk_en
D0
(see Fig-
10).
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