AS1115 DB-YELLOW austriamicrosystems, AS1115 DB-YELLOW Datasheet - Page 10

• Manufacturer Part Number: AS1115 DB-YELLOW
• Description: BOARD DEMO AS1115 YELLOW
• Manufacturer: austriamicrosystems

Specifications of AS1115 DB-YELLOW

• Current - Output / Channel: *
• Outputs And Type: 8, Non-Isolated
• Voltage - Output: *
• Features: 64 LED + 16 keys, I⊃2C
• Voltage - Input: 2.7 ~ 5.5 V
• Utilized Ic / Part: AS1115
• Lead Free Status / RoHS Status: Lead free by exemption / RoHS compliant by exemption

AS1115
Datasheet - D e t a i l e d D e s c r i p t i o n
The AS1115 can operate in the following slave modes:
I²C Device Self Addressing
If this feature is used, 2 of the 16 key readback nodes can be left open or shorted for self-addressing. This is done with
KEYA together with SEGG and SEGF. This two nodes cannot be used for key-readback in this case. After startup all
devices have the predefined adress 0000000. A single command for self-addressing will update all connected AS1115.
This command has to be done after startup or everytime the AS1115 gets disconnected from the supply. The I²C
address definition must be done with fixed connection, since I²C detection is excluded from debounce time of key reg-
isters.
I²C Device Address Byte
The address byte
Figure 20. I²C Device Address Byte
Following the START condition, the AS1115 monitors the I²C bus, checking the device type identifier being transmitted.
Upon receiving the address code, and the R/W bit, the slave device outputs an acknowledge signal on the SDA line.
www.austriamicrosystems.com/LED-Driver-ICs/AS1115
-
- Master Transmitter to Slave Receiver . The first byte transmitted by the master is the slave address, followed by
- Slave Transmitter to Master Receiver . The first byte, the slave address, is transmitted by the master. The slave
- Slave Receiver Mode . Serial data and clock are received through SDA and SCL. After each byte is received, an
- Slave Transmitter Mode . The first byte (the slave address) is received and handled as in the slave receiver
- The default slave address is factory-set to 0000000.
- The two LSB bits of the address byte are the device select bits, A0 to A1, which can be set by the self-adress
- The last bit of the address byte (R/W) define the operation to be performed. When set to a 1 a read operation is
acknowledge bit on the last byte that has been clocked out of the slave. In this case, the slave must leave the
data line HIGH to enable the master to generate the STOP condition.
Figure 19 on page 9
W bit, two types of data transfer are possible:
a number of data bytes. The slave returns an acknowledge bit after the slave address and each received byte.
then returns an acknowledge bit. Next, a number of data bytes are transmitted by the slave to the master. The
master returns an acknowledge bit after all received bytes other than the last byte. At the end of the last received
byte, a not-acknowledge is returned. The master device generates all of the serial clock pulses and the START
and STOP conditions. A transfer is ended with a STOP condition or a repeated START condition. Since a
repeated START condition is also the beginning of the next serial transfer, the bus will not be released.
acknowledge bit is transmitted. START and STOP conditions are recognized as the beginning and end of a serial
transfer. Address recognition is performed by hardware after reception of the slave address and direction bit.
mode. However, in this mode the direction bit will indicate that the transfer direction is reversed. Serial data is
transmitted on SDA by the AS1115 while the serial clock is input on SCL. START and STOP conditions are recog-
nized as the beginning and end of a serial transfer.
command after startup. A maximum of four devices with the same pre-set code can therefore be connected on
the same bus at one time.
selected; when set to a 0 a write operation is selected.
predefined address:
updated address:
(see Figure 20)
details how data transfer is accomplished on the I²C bus. Depending upon the state of the R/
MSB
MSB
0
0
is the first byte received following the START condition from the master device.
6
0
6
0
5
0
5
0
4
0
4
0
Revision 1.07
3
0
3
0
A1
2
0
2
A0
1
0
1
LSB
R/W
LSB
R/W
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