DAC102S085EB National Semiconductor, DAC102S085EB Datasheet - Page 5

• Manufacturer Part Number: DAC102S085EB
• Description: BOARD EVALUATION DAC102S085
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of DAC102S085EB

• Number Of Dac's: 2
• Number Of Bits: 10
• Outputs And Type: 2, Single Ended
• Data Interface: Serial
• Settling Time: 4.5µs
• Dac Type: Voltage
• Voltage Supply Source: Single
• Operating Temperature: -40°C ~ 105°C
• Utilized Ic / Part: DAC102S085
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.0 Board Assembly
The DAC124S085 evaluation board comes fully
assembled and ready for use. Refer to the Bill of
Materials for a description of components, to Figure 1
for major component placement, and to Figure 6 for the
Evaluation Board schematic.
3.0 Quick Start
The DAC124S085 evaluation board may be used in the
Stand-Alone mode while a Pattern Generator is used to
drive the DAC124S085, and a Signal Analyzer is used
to evaluate the analog output signal
3.1 Stand-Alone Mode
Refer to Figure 1 for locations of test points and major
components.
1.
2.
3.
SYNC
SCLK
D
IN
Connect a clean analog (not switching) +5V power
source
DAC124S085 board and turn on the power. Place
a jumper across pins 2 and 3 of JP1 to select
VA_REMOTE.
Place a jumper across the appropriate pins of JP2
to select the desired reference voltage. For the
default selection of V
across pins 2 & 3. Please see Table 1 for details.
Create the digital waveforms seen in Figure 2 with
your Pattern Generator. Ensure that SCLK doesn’t
exceed 40MHz.
Interface” and the DAC124S085 Datasheet for
further details.
(Refer to Appendix 2.0 for an enlarged version)
Figure 2: Digital Input Timing Diagram
t
SYNC
to
1
DB15
Power
t
SS
t
DS
2
t
DH
Refer to “Section 1.4: Serial
REF
t
CL
Connector
13
= VA, place a jumper
1 / f
SCLK
t
14
CH
15
J1
16
DB0
on
t
CFSR
the
5
5.
6.
4.
Interface header J3. Refer to Figure 3 below for
connection details.
The Analog Output signals of each channel can be
seen DC coupled at header J6. See the header
schematic of Figure 4 for details.
Select the desired output load by adding jumpers
to headers JP3 & JP4. See Figure 5 and Table 1 in
Section 4.0 for jumper configurations.
(*Pins 7&8 are used for SCL and SDA, respectively,
Figure 5: JP3 & JP4 Load Select Headers
Connect your Pattern Generator to Serial
Figure 3: J3 Serial Interface Header
Figure 4: J6 Output Header
when modified for WV4.0)
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