CDB4340A Cirrus Logic Inc, CDB4340A Datasheet - Page 6

• Manufacturer Part Number: CDB4340A
• Description: EVALUATION BOARD FOR CS4340A
• Manufacturer: Cirrus Logic Inc
• Series: Popguard®r

Specifications of CDB4340A

• Number Of Dac's: 2
• Number Of Bits: 24
• Outputs And Type: 2, Single Ended
• Sampling Rate (per Second): 192k
• Data Interface: Serial
• Dac Type: Voltage
• Voltage Supply Source: Single
• Operating Temperature: -10°C ~ 70°C
• Utilized Ic / Part: CS4340A
• Description/function: Audio D/A
• Operating Supply Voltage: 5 V
• Product: Audio Modules
• For Use With/related Products: CS4340A
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

3. APPLICATIONS
3.1
The CS4340A is pin and functionally compatible with all CS4340 designs, operating at the standard audio
sample rates, that use pin 3 as a serial clock input. In addition to the features of the CS4340, the CS4340A
supports standard sample rates up to 192 kHz, as well as automatic mode detection for sample rates be-
tween 4 and 200 kHz. The automatic mode detection feature allows sample rate changes between single,
double and quad-speed modes without external intervention.
The CS4340A does not support an internal serial clock mode, sample rates between 50 kHz and 84 kHz,
de-emphasis for 32 and 48 kHz, or 2.7 V operation as does the CS4340.
3.2
The device operates in one of three operational modes. It will auto-detect the correct mode when the input
sample rate (F
ple rates outside the specified range for each mode are not supported.
3.3
The device requires external generation of the master (MCLK), left/right (LRCK) and serial (SCLK)
clocks. The LRCK, defined also as the input sample rate (F
MCLK according to specified ratios. The specified ratios of MCLK to LRCK, along with several standard
audio sample rates and the required MCLK frequency, are illustrated in Tables 2-4.
6
4 kHz - 50 kHz
84 kHz - 100 kHz
170 kHz - 200 kHz
Upgrading from the CS4340 to the CS4340A
Sample Rate Range/Operational Mode Detect
System Clocking
s
), defined by the LRCK frequency, falls within one of the ranges illustrated in Table 1. Sam-
Input Sample Rate (F
S
Table 1. CS4340A Auto-Detect
)
Single-Speed Mode
Double-Speed Mode
Quad-Speed Mode
s
), must be synchronously derived from the
MODE
CS4340A
DS590F2