MAX5069EVKIT Maxim Integrated Products, MAX5069EVKIT Datasheet - Page 12

• Manufacturer Part Number: MAX5069EVKIT
• Description: EVAL KIT FOR MAX5069
• Manufacturer: Maxim Integrated Products

Specifications of MAX5069EVKIT

• Main Purpose: DC/DC, Step Down
• Outputs And Type: 1, Isolated
• Voltage - Output: 12V
• Current - Output: 10A
• Voltage - Input: 36 ~ 72V
• Regulator Topology: Buck
• Frequency - Switching: 500kHz
• Board Type: Fully Populated
• Utilized Ic / Part: MAX5069
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Normally, V
transformer. However, at startup there is no energy
delivered through the transformer; hence, a special
bootstrap sequence is required.
voltages on V
V
C1 charges through the startup resistor, R1, to an inter-
mediate voltage (see Figure 1). At this point, the inter-
nal regulator begins charging C3 (see
47µA of the current supplied by R1 is used by the
MAX5069A/B. The remaining input current charges C1
and C3. The charging of C3 stops when the V
age reaches approximately 9.5V. The voltage across
C1 continues rising until it reaches the wake-up level of
23.6V. Once V
old, NDRVA/NDRVB begin switching the MOSFETs and
energy is transferred to the secondary and tertiary out-
puts. If the voltage on the tertiary output builds to high-
er than 9.74V (the bootstrap UVLO lower threshold),
startup ends and sustained operation commences.
If V
device goes back to low-current UVLO. If this occurs,
increase the value of C1 to store enough energy to
allow for the voltage at the tertiary winding to build up.
The V
diately after wakeup (see
the connection configuration of the tertiary winding
determine the number of cycles available for startup.
Large values of C1 increase the startup time and also
supply extra gate charge for more cycles during initial
startup. If the value of C1 is too small, V
9.74V because NDRVA/NDRVB do not have enough
time to switch and build up sufficient voltage across the
tertiary output that powers the device. The device goes
back into UVLO and does not start. Use low-leakage
capacitors for C1 and C3.
Generally, offline power supplies keep typical startup
times to less than 500ms, even in low-line conditions
(85VAC input for universal offline applications or
36VDC for telecom applications). Size the startup resis-
tor, R1, to supply both the maximum startup bias of the
device (90µA) and the charging current for C1 and C3.
The bypass capacitor, C3, must charge to 9.5V, and
C1 must charge to 24V, within the desired time period
of 500ms. Because of the internal soft-start time of the
MAX5069, C1 must store enough charge to deliver cur-
rent to the device for at least 2047 oscillator clock
cycles. To calculate the approximate amount of capaci-
tance required, use the following formula:
High-Frequency, Current-Mode PWM Controller
with Accurate Oscillator and Dual FET Drivers
12
IN
IN
and V
______________________________________________________________________________________
drops below 9.74V before startup is complete, the
IN
bypass capacitor, C1, supplies current imme-
CC
IN
are 0V. After the input voltage is applied,
Power Supplies Using the MAX5069A/B
is derived from the tertiary winding of the
IN
MAX5069A/B Startup Operation
IN
and V
exceeds the bootstrap UVLO thresh-
Startup Time Considerations for
CC
Figure
during startup. Initially, both
1). The size of C1 and
Figure
Figure
IN
5 shows the
drops below
5). Only
CC
volt-
where I
startup (3.3mA, typ), Q
Q1 and Q2, f
switching frequency, V
teresis (12V), and t
clock cycles x 1 / f
Example:
Use a 4.7µF ceramic capacitor for C1.
Assuming C1 > C3, calculate the value of R1 as follows:
where V
(23.6V max), V
age for the application (36V for telecom), and I
the V
Figure
MAX5069 in Bootstrapped Mode (See
IN
C
1
5. V IN and V CC During Startup When Using the
IN
supply current at startup (90µA, max).
0V
SUVR
=
is the MAX5069’s internal supply current after
R
t
( .
1
SS
I
3 3
SW
g
IN(MIN)
C
≅
= (16nC) (250kHz) ≅ 4mA
is the bootstrap UVLO wakeup level
= 2047 x (1 / f
mA
1
is the MAX5069’s programmed output
I
I
C
g
V
=
1
ss
IN MIN
OSC
f
=
+
(
OSC
≅
is the internal soft-start time (2047
(
I
is the minimum input supply volt-
12
IN
HYST
100ms/div
Q
).
4
I
gtot
C
V
mA
V
)
gtot
SUVR
1
+
= 500kHz
V
−
500
+
) ( .
HYST
is the total gate charge for
I
is the bootstrap UVLO hys-
g
0 5 .
OSC
x f
I
)
4 1
START
ms
×
x t
SW
ms
x V
) = 4.1ms
Figure
C
SS
)
1
SUVR
=
1)
2 5
.
V
2V/div
MAX5069
V
5V/div
CC
IN
µ
PIN
F
START
is