LM5033SD-EVAL National Semiconductor, LM5033SD-EVAL Datasheet

LM5033SD-EVAL

Manufacturer Part Number

LM5033SD-EVAL

Description

BOARD EVALUATION LM5033SD

Manufacturer

National Semiconductor

Series

PowerWise®r

Datasheets

1.LM5033MMNOPB.pdf (17 pages)

2.LM5033SD-EVAL.pdf (10 pages)

Specifications of LM5033SD-EVAL

Main Purpose

DC/DC, Step Down

Outputs And Type

1, Non-Isolated

Voltage - Output

Current - Output

20A

Voltage - Input

40 ~ 60V

Regulator Topology

Buck

Frequency - Switching

315kHz

Board Type

Fully Populated

Utilized Ic / Part

LM5033

Lead Free Status / RoHS Status

Not applicable / Not applicable

Power - Output

Lead Free Status / Rohs Status

Not Compliant

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LM5033 Evaluation Board

Introduction

The LM5033EVAL evaluation board provides the design en-

gineer with a fully functional intermediate bus converter

(IBC) employing a half-bridge topology. Configured as an

IBC, the circuit operates open loop, resulting in an output

voltage which tracks the input voltage. Operating open loop

results in very high efficiency (

erates at maximum duty cycle, making best use of the

transformer with minimal deadtime.

IBCs are used to change a relatively high voltage (e.g., 48V)

to a lower voltage (e.g., 9V) to power Point-of-Load (POL)

regulators. Since many POLs are buck converters, which

have higher efficiency when their input voltage is low, the

combination of IBC+POLs provides higher overall system

efficiency. Additionally, an IBC provides isolation which buck

converters do not.

This board’s specifications are:

•

• Output voltage: 7.5V to 11.3V, 9.0V nominal

• Output current: 0 to 20A

• Measured efficiency: 95.5% (40V

• Load regulation: ± 4% (0-20A)

• Internal oscillator frequency: 315 kHz

• Current limit: )23A

• Shutdown input

• Synchronizing input

Input voltage: 40V to 60V, 48V nominal

95%), since the circuit op-

AN201077

FIGURE 1. Evaluation Board - Top Side

60V, Io = 11A)

National Semiconductor

Application Note 1331

Dennis Morgan

May 2004

• Size: 2.3 x 1.45 x 0.43 in. (

The printed circuit board consists of 4 layers of 2 oz copper

on FR4 material, with a thickness of 0.050 in. It is designed

for continuous operation at rated load with a minimum airflow

of 200 LFPM.

Theory of Operation

Referring to Figure 8, the circuit is a half-bridge configuration

with Q1 and Q2 as the high side and low side switches,

respectively. The half supply point is at the junction of C1-C2

and C3-C4, with R1 and R2 ensuring equal voltage division

from V

Q2 via the LM5100 level shifting gate driver. The power

transformer (T1) has a 5-turn primary, and two secondaries

of 2 turns each with a common terminal. The secondary side

uses synchronous rectifiers Q3 and Q4 to maintain high

efficiency. The 4-turn auxiliary winding powers the V

to reduce power dissipation within the LM5033.

Current sensing transformer T2 provides primary side cur-

rent information to the LM5033 (pin 8) for over-current de-

tection.

Comparators U2A, U2B, and U3A provide under-voltage

(UVLO) and over-voltage (OVLO) sensing of V

outside the range of 40-60V, the circuit shuts down.

This evaluation board can be synchronized to an external

clock. A shutdown pin permits shutting down the output

voltage by using an external switch to ground.

. The LM5033 controller alternately drives Q1 and

⁄

brick footprint)

www.national.com

20107701

. If V

line

Related parts for LM5033SD-EVAL

LM5033SD-EVAL Summary of contents

Page 1

... Load regulation: ± 4% (0-20A) • Internal oscillator frequency: 315 kHz • Current limit: )23A • Shutdown input • Synchronizing input © 2004 National Semiconductor Corporation National Semiconductor Application Note 1331 Dennis Morgan May 2004 • Size: 2.3 x 1.45 x 0.43 in. ( The printed circuit board consists of 4 layers copper on FR4 material, with a thickness of 0 ...

Page 2

Theory of Operation Board Layout and Probing The pictorial in Figure 1 and Figure 2 shows the placement of the significant components which may be probed in evalu- ating the circuit’s operation. The following should be kept in mind when ...

Page 3

Primary Side Operation flows out of C3/C4 through T2, T1’s primary, and Q2 to ground. The LM5033’s guaranteed deadtime ensures Q1 and Q2 are never on simultaneously. Secondary Side Operation When Q1 is on, T1’s pin 6 is high relative ...

Page 4

Shutdown The On/Off pin (J2) permits shutting off the converter by an external switch. J2 must be taken below 0.8V with an open collector or open drain device to disable the LM5033 out- puts. Releasing the pin allows the circuit ...

Page 5

FIGURE 5. Input Current vs Load Current FIGURE Load Current and V OUT FIGURE 7. Efficiency vs Load Current 5 20107705 20107706 IN 20107707 www.national.com ...

Page 6

www.national.com 6 ...

Page 7

Bill of Materials Item Item BR1 Schottky diode bridge Diodes, Inc. BAT54BRW C1-4 Capacitor C5 Capacitor C6 Capacitor C7, 12, 16, Capacitor 20-23 C8, 9 Capacitor C10, 11 Capacitor C13 Capacitor C14 Capacitor C15, 24 Capacitor C17 Capacitor C18 Capacitor ...

Page 8

... Dual Micropower Comparator U4 Gate Driver Z1, 2 Zener diode PCB Layouts www.national.com Mfg., Part No. Package Pulse Eng. P8208 National Semi LM5033SD Nat’l Semi LMC6772 Mini SO-8 National Semi LM5100M Central Semi CMPZ4698 SOT-23 Top Silk Screen Top Layer 8 Value SMD 100:1, 10A ...

Page 9

PCB Layouts (Continued) Layer 2 Layer 3 Bottom Layer, as viewed from the Top 9 20107711 20107712 20107713 www.national.com ...

Page 10

... BANNED SUBSTANCE COMPLIANCE National Semiconductor certifies that the products and packing materials meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ‘‘Banned Substances’’ as defined in CSP-9-111S2. ...

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