LP3906SQ-JXXIEV National Semiconductor, LP3906SQ-JXXIEV Datasheet - Page 18

• Manufacturer Part Number: LP3906SQ-JXXIEV
• Description: BOARD EVALUATION LP3906SQ-JXXI
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of LP3906SQ-JXXIEV

• Main Purpose: DC/DC, Step Down with LDO
• Outputs And Type: 4, Non-Isolated
• Current - Output: 1.5A, 1.5A, 300mA, 300mA
• Regulator Topology: Buck
• Frequency - Switching: 2MHz
• Board Type: Fully Populated
• Utilized Ic / Part: LP3906
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Voltage - Output: -
• Voltage - Input: -
• Power - Output: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

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POWER ON
EN_T assertion causes the LP3906 to emerge from Standby
mode to Full Operation mode at a preset timing sequence. By
default, the enables for the LDOs and Bucks are internally
pulled up, which causes the part to turn ON automatically. If
the user wishes to have a preset timing sequence to power
on the regulators, the external regulator enables must be tied
LOW. Otherwise, simply tie the enables of each specific reg-
ulator HIGH.
EN_T is edge triggered with rising edge signaling the chip to
power on. The EN_T input is deglitched and the default is set
at 1 ms. As shown in the next 2 diagrams, a rising EN_T edge
will start a power on sequence, while a falling EN_T edge will
start a shutdown sequence. If EN_T is high, toggling the ex-
ternal enables of the regulators will have no effect on the chip.
Note: LP3906 The default Power on delays can be reprogrammed at final
t
1
test or by using I
1.5
(ms)
Default Power ON Sequence:
2
t
C registers to 1, 1.5, 2, 3, 6, or 11 ms.
2
2.0
(ms)
t
3
(ms)
3
t
4
(ms)
6
18
The regulators can also be programmed through I
on and off. By default, the I
ON.
The regulators are on following the pattern below:
Regulators on = (I
EN_T high).
2
C enable) AND (External pin enable OR
2
C enables for the regulators are
2
C to turn
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