LM2750LD-ADJEV National Semiconductor, LM2750LD-ADJEV Datasheet - Page 4

BOARD EVAL LM2750LD-ADJ

LM2750LD-ADJEV

Manufacturer Part Number
LM2750LD-ADJEV
Description
BOARD EVAL LM2750LD-ADJ
Manufacturer
National Semiconductor
Series
PowerWise®r
Datasheets

Specifications of LM2750LD-ADJEV

Main Purpose
DC/DC, Step Up
Outputs And Type
1, Non-Isolated
Voltage - Output
3.8 ~ 5.2V
Current - Output
120mA
Voltage - Input
2.7 ~ 5.6V
Regulator Topology
Boost
Frequency - Switching
1.7MHz
Board Type
Fully Populated
Utilized Ic / Part
LM2750
Lead Free Status / RoHS Status
Not applicable / Not applicable
Power - Output
-
Lead Free Status / Rohs Status
Not Compliant
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Capacitor Requirements
C
C
IN
OUT
Electrical Characteristics
Typical values and limits in standard typeface apply for T
temperature range. Unless otherwise specified: 2.9V ≤ V
= 2 x 1µF, C
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of
the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the
Electrical Characteristics tables.
Note 3: All voltages are with respect to the potential at the GND pin.
Note 4: Thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at T
Note 5: Absiolute Maximum Output Current guaranteed by design. Recommended input voltage range for output currents in excess of 120mA: 3.1V to 4.4V.
Note 6: The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. MIL-STD-883 3015.7. The machine model is a 200pF
capacitor discharged directly into each pin.
Note 7: Maximum ambient temperature (T
dissipation of the device in the application (P
following equation: T
equation: P
I
The maximum ambient temperature rating of 85
V
20mW above 727mW (again assuming that θ
Leadframe Package (LLP) and the Power Efficiency and Power Dissipation section of this datasheet.
Note 8: Junction-to-ambient thermal resistance (θ
standard JESD51-7. The test board is a 4 layer FR-4 board measuring 102mm x 76mm x 1.6mm with a 2 x 1 array of thermal vias. The ground plane on the board
is 50mm x 50mm. Thickness of copper layers are 36µm/18µm /18µm/36µm (1.5oz/1oz/1oz/1.5oz). Ambient temperature in simulation is 22˚C, still air. Power
dissipation is 1W.
The value of θ
conditions. In applications where high maximum power dissipation exists (high V
information on these topics, please refer to Application Note 1187: Leadless Leadframe Package (LLP) and the Layout Recommendations section of this
datasheet.
Note 9: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Note 10: C
Note 11: Turn-on time is measured from when SD signal is pulled high until the output voltage crosses 90% of its final value.
Note 12: Efficiency is measured versus V
results. Weighting to account for battery voltage discharge characteristics (V
Note 13: SD Input Current (I
Note 14: Limit is the minimum required output capacitance to ensure proper operation. This electrical specification is guaranteed by design.
OUT-MAX
IN-MAX
Symbol
= 5.5V and I
are the maximum voltage/current of the specific application, and not necessarily the maximum rating of the LM2750.
D-MAX
FLY
JA
, C
OUT
of the LM2750 in LLP-10 could fall in a range as wide as 50
IN
= (V
, and C
A-MAX
Required Input
Capacitance(Note 14)
Required Output
Capacitance(Note 14)
OUT-MAX
= 2 x 1µF (Note 10).
IN-MAX
= T
OUT
IH
x I
= 115mA, for example). Maximum ambient temperature must be derated by 1.1
J-MAX-OP
: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics
) is due to a 200kΩ (typ.) pull-down resistor connected internally between the SD pin and GND.
IN-MAX
Parameter
) - (V
- (θ
IN
JA
A-MAX
JA
OUT
, with V
D-MAX
x P
= 55
D-MAX
o
x I
) is dependent on the maximum operating junction temperature (T
C is determined under the following application conditions: θ
JA
o
), and the junction-to ambient thermal resistance of the part/package in the application (θ
OUT-MAX
C/W in the application). For more information on these topics, please refer to Application Note 1187: Leadless
) is taken from a thermal modeling result, performed under the conditions and guidelines set forth in the JEDEC
IN
). Maximum power dissipation of the LM2750 in a given application can be approximated using the following
being swept in small increments from 3.0V to 4.2V. The average is calculated from these measurements
(Notes 3, 9) (Continued)
) = [V
I
60mA ≤ I
I
60mA ≤ I
OUT
OUT
IN-MAX
≤ 60mA
≤ 60mA
IN
J
x ((2 x I
= 25
≤ 5.6V, V
o
C/W to 150
BAT
OUT
OUT
Conditions
4
vs. Time) is not done in computing the average.
o
IN
OUT-MAX
C. Limits in boldface type apply over the operating junction
≤ 120mA
≤ 120mA
, high I
OUT
o
C/W (if not wider), depending on PCB material, layout, and environmental
OUT
) + 5mA)] - (V
= 5.0V (LM2750-ADJ), V(SD) = V
), special care must be paid to thermal dissipation issues. For more
OUT
x I
o
C for every increase in internal power dissipation of
OUT-MAX
JA
J
Min
=150˚C (typ.) and disengages at T
1.0
2.0
1.0
2.0
= 55
J-MAX-OP
o
). In this equation, V
C/W, P
Typ
D-MAX
= 125
= 727mW (achieved when
o
C), the maximum power
IN
, C
Max
IN-MAX
JA
FLY
), as given by the
J
= 1µF, C
, I
=135˚C (typ.).
IN-MAX
Units
, and
µF
µF
IN

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