ADP2102-0.8-EVALZ Analog Devices Inc, ADP2102-0.8-EVALZ Datasheet - Page 7

• Manufacturer Part Number: ADP2102-0.8-EVALZ
• Description: BOARD EVAL FOR ADP2102-0.8
• Manufacturer: Analog Devices Inc

Specifications of ADP2102-0.8-EVALZ

• Main Purpose: DC/DC, Step Down
• Outputs And Type: 1, Non-Isolated
• Voltage - Output: 0.8V
• Current - Output: 600mA
• Voltage - Input: 2.7 ~ 5.5V
• Regulator Topology: Buck
• Board Type: Fully Populated
• Utilized Ic / Part: ADP2102
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -
• Frequency - Switching: -

CIRCUIT BOARD LAYOUT RECOMMENDATIONS
Good circuit board layout is essential in obtaining the best
performance from the ADP2102 (see Figure 9, Figure 10, and
Figure 11). Poor circuit layout degrades the output ripple and
regulation, as well as the EMI and electromagnetic compatibility
performance.
Refer to the following guidelines for optimum layout:
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•
Use separate analog and power ground planes. Connect the
ground reference of sensitive analog circuitry, such as output
voltage divider components, to analog ground. In addition,
connect the ground references of power components, such
as input and output capacitors, to power ground. Connect
both ground planes to the exposed pad of the ADP2102.
Place the input capacitor as close to the PVIN pin as
possible and connect the other end to the closest power
ground plane.
For low noise and better transient performance, a filter is
recommended between PVIN and AVIN. Place the 0.1 μF,
10 Ω low-pass input filter as close to AVIN as possible,
between the AVIN pin and the PVIN pin; or the AVIN can
be bypassed with a ≥1 pF capacitor to the nearest GND plane.
Rev. A | Page 7 of 12
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Ensure that the high current loops are as short and as wide
as possible. Make the high current path from CIN through
L1, COUT, and the PGND plane back to CIN as short as
possible. To accomplish this, ensure that the input and output
capacitors share a common PGND plane. In addition, make
the high current path from the PGND pin through L1 and
COUT and back to the PGND plane as short as possible.
To do this, ensure that the PGND pin of the ADP2102 is
tied as close as possible to the input and output capacitors on
the PGND plane.
Place the feedback resistor divider network as close as possible
to the FB pin to prevent noise pickup. Try to minimize the
length of the trace connecting the top of the feedback
resistor divider to the output while keeping away from the
high current traces and the switch node (LX) that can lead
to noise pickup. To reduce noise and parasitic capacitance
pickup, place an analog ground plane on either side of the
FB trace and make it as small as possible.
EVAL-ADP2102