LM4946SQEVAL National Semiconductor, LM4946SQEVAL Datasheet - Page 26

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LM4946SQEVAL

Manufacturer Part Number
LM4946SQEVAL
Description
BOARD EVALUATION LM4946SQ
Manufacturer
National Semiconductor
Series
Boomer®r
Datasheet

Specifications of LM4946SQEVAL

Amplifier Type
Class D
Output Type
1-Channel (Mono) with Stereo Headphones
Max Output Power X Channels @ Load
1.3W x 1 @ 8 Ohm; 85mW x 2 @ 32 Ohm
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Board Type
Fully Populated
Utilized Ic / Part
LM4946
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
www.national.com
PCB LAYOUT AND SUPPLY REGULATION
CONSIDERATIONS FOR DRIVING 8Ω LOAD
Power dissipated by a load is a function of the voltage swing
across the load and the load's impedance. As load impedance
decreases, load dissipation becomes increasingly dependent
on the interconnect (PCB trace and wire) resistance between
the amplifier output pins and the load's connections. Residual
trace resistance causes a voltage drop, which results in power
dissipated in the trace and not in the load as desired. For ex-
ample, 0.1Ω trace resistance reduces the output power dis-
sipated by an 8Ω load from 158.3mW to 156.4mW. The
problem of decreased load dissipation is exacerbated as load
impedance decreases. Therefore, to maintain the highest
load dissipation and widest output voltage swing, PCB traces
that connect the output pins to a load must be as wide as
possible.
Poor power supply regulation adversely affects maximum
output power. A poorly regulated supply's output voltage de-
creases with increasing load current. Reduced supply voltage
causes decreased headroom, output signal clipping, and re-
duced output power. Even with tightly regulated supplies,
trace resistance creates the same effects as poor supply reg-
ulation. Therefore, making the power supply traces as wide
as possible helps maintain full output voltage swing.
BRIDGE CONFIGURATION EXPLANATION
The LM4946 drives a load, such as a speaker, connected be-
tween outputs, MONO+ and MONO-.
This results in both amplifiers producing signals identical in
magnitude, but 180° out of phase. Taking advantage of this
phase difference, a load is placed between MONO- and
MONO+ and driven differentially (commonly referred to as
”bridge mode”). This results in a differential or BTL gain of:
Bridge mode amplifiers are different from single-ended am-
plifiers that drive loads connected between a single amplifier's
output and ground. For a given supply voltage, bridge mode
has a distinct advantage over the single-ended configuration:
its differential output doubles the voltage swing across the
load. Theoretically, this produces four times the output power
when compared to a single-ended amplifier under the same
conditions. This increase in attainable output power assumes
that the amplifier is not current limited and that the output sig-
nal is not clipped.
Another advantage of the differential bridge output is no net
DC voltage across the load. This is accomplished by biasing
MONO- and MONO+ outputs at half-supply. This eliminates
the coupling capacitor that single supply, single-ended am-
plifiers require. Eliminating an output coupling capacitor in a
typical single-ended configuration forces a single-supply
amplifier's half-supply bias voltage across the load. This in-
creases internal IC power dissipation and may permanently
damage loads such as speakers.
POWER DISSIPATION
Power dissipation is a major concern when designing a suc-
cessful single-ended or bridged amplifier.
A direct consequence of the increased power delivered to the
load by a bridge amplifier is higher internal power dissipation.
The LM4946 has a pair of bridged-tied amplifiers driving a
handsfree speaker, MONO. The maximum internal power
dissipation operating in the bridge mode is twice that of a sin-
gle-ended amplifier. From Equation (8), assuming a 5V power
A
VD
= 2(R
f
/ R
i
) = 2
(7)
26
supply and an 8Ω load, the maximum MONO power dissipa-
tion is 634mW.
The LM4946 also has a pair of single-ended amplifiers driving
stereo headphones, R
power dissipation for R
and (10). From Equations (9) and (10), assuming a 5V power
supply and a 32Ω load, the maximum power dissipation for
L
The maximum internal power dissipation of the LM4946 oc-
curs when all three amplifiers pairs are simultaneously on;
and is given by Equation (11).
The maximum power dissipation point given by Equation (11)
must not exceed the power dissipation given by Equation
(12):
The LM4946's T
LM4946's θ
T
dissipation supported by the IC packaging. Rearranging
Equation (12) and substituting P
in Equation (13). This equation gives the maximum ambient
temperature that still allows maximum stereo power dissipa-
tion without violating the LM4946's maximum junction tem-
perature.
For a typical application with a 5V power supply and an 8Ω
load, the maximum ambient temperature that allows maxi-
mum mono power dissipation without exceeding the maxi-
mum junction temperature is approximately 121°C for the SQ
package.
Equation (14) gives the maximum junction temperature
T
maximum junction temperature by reducing the power supply
voltage or increasing the load resistance. Further allowance
should be made for increased ambient temperatures.
The above examples assume that a device is a surface mount
part operating around the maximum power dissipation point.
Since internal power dissipation is a function of output power,
higher ambient temperatures are allowed as output power or
duty cycle decreases. If the result of Equation (11) is greater
than that of Equation (12), then decrease the supply voltage,
increase the load impedance, or reduce the ambient temper-
ature. If these measures are insufficient, a heat sink can be
added to reduce θ
ditional copper area around the package, with connections to
OUT
P
A
JMAX
P
P
, use Equation (12) to find the maximum internal power
DMAX-ROUT
DMAX-LOUT
DMAX-SPKROUT
and R
. If the result violates the LM4946's 150°C, reduce the
P
DMAX-SPKROUT
OUT
JA
T
T
= (V
= (V
JMAX
A
P
is 46°C/W. At any given ambient temperature
is 40mW, or 80mW total.
DMAX
= T
DD
DD
JMAX
= 4(V
JA
= P
JMAX
)
)
. The heat sink can be created using ad-
P
2
2
+ P
= (T
DMAX-TOTAL
/ (2π
/ (2π
DMAX-TOTAL
OUT
OUT
DD
= 150°C. In the SQ package, the
- P
DMAX-LOUT
JMAX
)
2
and L
and L
2
2
DMAX-TOTAL
/ (2π
R
R
L
L
- T
): Single-ended Mode
): Single-ended Mode
DMAX-TOTAL
OUT
2
OUT
=
A
θ
) / θ
R
JA
+ P
L
. The maximum internal
): Bridge Mode
is given by equation (9)
+ T
JA
θ
DMAX-ROUT
JA
A
for P
DMAX
' results
(10)
(11)
(12)
(13)
(14)
(8)
(9)

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