MAX105EVKIT Maxim Integrated Products, MAX105EVKIT Datasheet - Page 17

• Manufacturer Part Number: MAX105EVKIT
• Description: KIT EVAL FOR MAX105 AND MAX107
• Manufacturer: Maxim Integrated Products

Specifications of MAX105EVKIT

• Number Of Adc's: 2
• Number Of Bits: 6
• Sampling Rate (per Second): 800M
• Data Interface: Parallel
• Inputs Per Adc: 1 Differential
• Input Range: 800 mVpp
• Power (typ) @ Conditions: 2.6W @ 800MSPS
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: MAX105, MAX107
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 9. MAX107 Decoupling, Bypassing and Grounding
capacitor, to filter power supply noise, in parallel with a
0.1µF capacitor. A combination of 0.01µF in parallel
with high quality 47pF ceramic chip capacitor located
very close to the MAX107 device filters high frequency
noise. A properly designed PC board (see MAX105EV
Kit data sheet) allows the user to connect all analog
supplies and all digital supplies together thereby
requiring only two separate power sources. Decoupling
______________________________________________________________________________________
Dual, 6-Bit, 400Msps ADC with On-Chip,
PC BOARD AGND
PC BOARD OGND
PC BOARD AV
PC BOARD OV
NOTE:
LOCATE ALL 47pF AND 10nF CAPACITORS, WHICH DECOUPLE AV
AS POSSIBLE TO THE CHIP. IT IS ALSO RECOMMENDED TO CONNECT ALL ANALOG GROUND CONNECTIONS TO A COMMON ANALOG
GROUND PLANE AND ALL DIGITAL GROUND CONNECTIONS TO ONE COMMON DIGITAL GROUND PLANE ON THE PC BOARD. A SIMILAR
TECHNIQUE CAN BE USED FOR ALL ANALOG AND DIGITAL POWER SUPPLIES.
AV
OV
CC
CC
AGNDQ
AGNDR
I = OV
AV
AV
AGNDI
= AV
AV
AGND
AV
CC
CC
CC
CC
CC
CC
CC
Q
R
CC
I
I = AV
Q = +3.3V±10%
10µF
10µF
10nF
10nF
10nF
10nF
CC
Q = AV
CC
R = +5V±5%
10nF
10nF
47pF
47pF
47pF
47pF
AV
AGNDR
AV
AGNDI
AV
AGNDQ
AV
AGND
CC
CC
CC
CC
SUPPRESSORS
OV
FERRITE-BEAD
R
I
Q
CC
Wideband Input Amplifier
I, OV
CC
MAX107
Q
AV
suppressors prevents further crosstalk between the
individual analog supply pins
The MAX107 is designed for a thermally enhanced 80-
pin TQFP package, providing greater design flexibility,
increased thermal efficiency and a low thermal junc-
CC
I, AV
CC
CC
, AV
Q, AV
OGNDQ
OGNDQ
OV
OV
OGNDI
OGNDI
OV
OV
CC
CC
CC
CC
CC
Q
Q
CC
R, OV
I
I
47pF
47pF
47pF
47pF
I, AV
CC
I, AND OV
CC
CC
Q and AV
Q AS CLOSE
10nF
10nF
10nF
10nF
4 x 10nF
Thermal Management
OV
OGNDI
OV
OGNDI
OV
OGNDQ
OV
OGNDQ
CC
CC
CC
CC
CC
I
I
Q
Q
R with ferrite-bead
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