MAX1162EVC16 Maxim Integrated Products, MAX1162EVC16 Datasheet - Page 15

• Manufacturer Part Number: MAX1162EVC16
• Description: EVAL KIT FOR MAX1162
• Manufacturer: Maxim Integrated Products

Specifications of MAX1162EVC16

• Number Of Adc's: 1
• Number Of Bits: 16
• Sampling Rate (per Second): 200k
• Data Interface: Serial
• Inputs Per Adc: 1 Single Ended
• Input Range: 0 ~ VREF
• Voltage Supply Source: Analog and Digital
• Operating Temperature: 0°C ~ 70°C
• Utilized Ic / Part: MAX1162, MAX1062
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

neously. Three consecutive 8-bit readings (Figure 12b)
are necessary to obtain the entire 16-bit result from the
ADC. DOUT data transitions on the serial clock’s falling
edge and is clocked into the µC on SCLK’s rising edge.
The first 8-bit data stream contains all zeros. The sec-
ond 8-bit data stream contains the MSB through D8.
The third 8-bit data stream contains bits D7 through D0.
Integral nonlinearity (INL) is the deviation of the values
on an actual transfer function from a straight line. This
straight line can be either a best-fit straight line fit or a
line drawn between the endpoints of the transfer func-
Table 2. Detailed SSPSTAT Register Contents
X = Don’t care.
Figure 12b. SPI Interface Timing with PIC16/PIC17 in Master Mode (CKE = 1, CKP = 0, SMP = 0, SSPM3 - SSPM0 = 0001)
*WHEN CS IS HIGH, DOUT = HIGH-Z
SMP
CKE
DOUT*
R/W
D/A
SCLK
UA
CONTROL BIT
BF
P
S
CS
TIMING NOT TO SCALE.
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
______________________________________________________________________________________
0
SETTINGS
MAX1162
0
X
X
X
X
X
X
0
1
Integral Nonlinearity
16-Bit, +5V, 200ksps ADC with 10µA
0
1ST BYTE READ
0
SPI Data Input Sample Phase. Input data is sampled at the middle of the data output time.
SPI Clock Edge Select Bit. Data is transmitted on the rising edge of the serial clock.
Data Address Bit
Stop Bit
Start Bit
Read/Write Bit Information
Update Address
Buffer Full Status Bit
Definitions
0
D7
0
SYNCHRONOUS SERIAL-PORT CONTROL REGISTER (SSPSTAT)
0
D6
0
D5
3RD BYTE READ
D4
20
tion, once offset and gain errors have been nulled. The
static linearity parameters for the MAX1162 are mea-
sured using the endpoint method.
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1LSB. A
DNL error specification of 1LSB guarantees no missing
codes and a monotonic transfer function.
Aperture jitter (t
the time between samples. Aperture delay (t
time between the falling edge of the sampling clock
and the instant when the actual sample is taken.
D3
D2
MSB
D15
D1
D14
LSB
D0
AJ
24
) is the sample-to-sample variation in
D13
HIGH-Z
2ND BYTE READ
D12
Differential Nonlinearity
12
D11
Aperture Definitions
Shutdown
D10
D9
D8
16
AD
D7
) is the
15