MAX1402EVKIT Maxim Integrated Products, MAX1402EVKIT Datasheet - Page 31

• Manufacturer Part Number: MAX1402EVKIT
• Description: EVAL KIT FOR MAX1402
• Manufacturer: Maxim Integrated Products

Specifications of MAX1402EVKIT

• Number Of Adc's: 1
• Number Of Bits: 18
• Sampling Rate (per Second): 480
• Data Interface: Serial
• Inputs Per Adc: 6 Single Ended
• Input Range: ±VREF/2
• Power (typ) @ Conditions: 26.7mW @ 480SPS
• Voltage Supply Source: Analog and Digital
• Operating Temperature: 0°C ~ 70°C
• Utilized Ic / Part: MAX1402
• Interface Type: SMA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: MAX1402

The digital filter does not provide any rejection close to
the harmonics of the modulator sample frequency.
However, due to the high oversampling ratio of the
MAX1402, these bands occupy only a small fraction of
the spectrum and most broadband noise is filtered.
Therefore, the analog filtering requirements in front of
the MAX1402 are considerably reduced compared to a
conventional converter with no on-chip filtering. In addi-
tion, because the part’s common-mode rejection of
90dB extends out to several kHz, common-mode noise
susceptibility in this frequency range is substantially
reduced.
Depending on the application, it may be necessary to
provide filtering prior to the MAX1402 to eliminate
unwanted frequencies the digital filter does not reject. It
may also be necessary in some applications to provide
additional filtering to ensure that differential noise sig-
nals outside the frequency band of interest do not satu-
rate the analog modulator.
If passive components are placed in front of the
MAX1402, when the part is used in unbuffered mode,
ensure that the source impedance is low enough not to
introduce gain errors in the system (Table 13). This can
significantly limit the amount of passive anti-aliasing fil-
tering that can be applied in front of the MAX1402 in
unbuffered mode. However, when the part is used in
buffered mode, large source impedances will simply
result in a small DC offset error (a 1kΩ source resis-
tance will cause an offset error of less than 10µV).
Therefore, where any significant source impedances
are required, Maxim recommends operating the part in
buffered mode.
Two fully differential calibration channels allow mea-
surement of the system gain and offset errors. Connect
the CALOFF channel to 0V and the CALGAIN channel
to the reference voltage. Average several measure-
ments on both CALOFF and CALGAIN. Subtract the
average offset code and scale to correct for the gain
error. This linear calibration technique can be used to
remove errors due to source impedances on the analog
input (e.g., when using a simple RC anti-aliasing filter
on the front end).
______________________________________________________________________________________
+5V, 18-Bit, Low-Power, Multichannel,
Calibration Channels
Analog Filtering
Oversampling (Sigma-Delta) ADC
Microprocessors with a hardware SPI (serial peripheral
interface) can use a 3-wire interface to the MAX1402
(Figure 12). The SPI hardware generates groups of
eight pulses on SCLK, shifting data in on one pin and
out on the other pin.
For best results, use a hardware interrupt to monitor the
INT pin and acquire new data as soon as it is available.
If hardware interrupts are not available, or if interrupt
latency is longer than the selected conversion rate, use
the FSYNC bit to prevent automatic measurement while
reading the data output register.
The example code in Figure 13 shows how to interface
with the MAX1402 using a 68HC11. System-dependent
initialization code is not shown.
Any microcontroller can use general-purpose I/O pins
to interface to the MAX1402. If a bidirectional or open-
drain I/O pin is available, reduce the interface pin count
by connecting DIN to DOUT (Figure 14). Figure 15
shows how to emulate the SPI in software. Use the
same initialization routine shown in Figure 13.
For best results, use a hardware interrupt to monitor the
INT pin and acquire new data as soon as it is available.
If hardware interrupts are not available, or if interrupt
latency is longer than the selected conversion rate, use
the FSYNC bit to prevent automatic measurement while
reading the data output register.
Figure 12. MAX1402 to 68HC11 Interface
Bit-Banging Interface (80C51, PIC16C54)
68HC11
SPI Interface (68HC11, PIC16C73)
INTERRUPT
Applications Information
MOSI
MISO
SCK
SS
V
DD
V
DD
DIN
CS
RESET
INT
SCLK
DOUT
MAX1402
31