AS1524 EB austriamicrosystems, AS1524 EB Datasheet - Page 18

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AS1524 EB

Manufacturer Part Number
AS1524 EB
Description
BOARD EVAL AS1524
Manufacturer
austriamicrosystems
Datasheets

Specifications of AS1524 EB

Number Of Adc's
1
Number Of Bits
12
Sampling Rate (per Second)
150k
Data Interface
Serial
Inputs Per Adc
1 Differential
Input Range
0 ~ VREF
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AS1524
Lead Free Status / RoHS Status
Lead free by exemption / RoHS compliant by exemption
AS1524/AS1525
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
Table 6. SSPCON Register Settings
Table 7. SSPSTAT Register Settings
www.austriamicrosystems.com
SSPM3:1
SSPOV
SSPEN
SSPM0
WCOL
SMP
CKP
CKE
R/W
D/A
UA
BF
Control Bit
Control Bit
P
S
Bit 3:1
Bit 7
Bit 5
Bit 4
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 1
Bit 0
Bit 6
Bit 2
AS1524/AS1525
AS1524/AS1525
Setting
Setting
X
X
X
X
X
X
X
X
1
0
0
1
0
1
Write Collision Detection Bit
Receive Overflow Detect Bit
Synchronous Serial Port Enable
0: Disables serial port and configures these pins as I/O port pins.
1: Enables serial port and configures SCK, SDO, and SCI pins as serial port
pins.
Clock Polarity Select Bit. CKP = 0 for SPI master mode selection.
Synchronous Serial Port Mode Select Bit. Sets SPI master mode and
selects FCLK = fOSC / 16.
SPI Data Input Sample Phase. Input data is sampled at the middle of the
data output time.
SPI Clock Edge Select Bit. Data is transmitted on the rising edge of the
serial clock.
Data Address Bit
Stop Bit
Start Bit
Read/Write Bit Information
Update Address
Buffer Full Status Bit
Synchronous Serial Port Control Register (SSPCON)
Revision 1.02
Synchronous Serial Status Register (SSPSTAT)
18 - 22

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