ADC14DS105KARB/NOPB National Semiconductor, ADC14DS105KARB/NOPB Datasheet - Page 3

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ADC14DS105KARB/NOPB

Manufacturer Part Number
ADC14DS105KARB/NOPB
Description
BOARD EVAL FOR ADC14DS105KARB
Manufacturer
National Semiconductor
Series
PowerWise®r

Specifications of ADC14DS105KARB/NOPB

Design Resources
ADC14DS105KARB Ref Design
Number Of Adc's
2
Number Of Bits
14
Sampling Rate (per Second)
105M
Data Interface
Serial
Inputs Per Adc
1 Differential
Power (typ) @ Conditions
1W @ 105MSPS
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
ADC14DS105
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ADC14DS105KARB
1.0 Introduction
The ADC14DS105KARB is a near-zero IF receiver
reference design board that utilizes the following
components from National Semiconductor:
2.0 Data Capture
The digital data from the ADC14DS105KARB reference
design board can be captured with a suitable
instrument, such as a logic analyzer, or with National
Semiconductor’s
acquisition hardware and software platform.
ADC14DS105KARB board can be connected to the
data acquisition hardware through the 60-pin connector
mounted on the board edge.
N
• Two LMH6552 1.5 GHz bandwidth differential
• ADC14DS105 14-bit, 1 GHz, Dual 105 MSPS
• LMK02000 low-jitter precision clock conditioner
• Several energy-efficient power management ICs.
current feedback amplifiers;
(Megasample per Second) ADC with serial LVDS
outputs;
with an integrated phase-locked loop (PLL) that
provides 128 femtosecond (fs) jitter over an
integration bandwidth of 100 Hz to 20 MHz;
WaveVision
signal
Figure 2. ADC14DS105KARB Block Diagram
ADC14DS105KARB Reference Design Board User’s Guide
path
data
The
- 3 -
This subsystem reference design utilizes the LMH6552
current feedback amplifier as a differential driver for the
ADC14DS105. The sampling clock is provided by a
100 MHz VCXO which is locked to a reference
oscillator by the LMK02000.
The 1 GHz input bandwidth of the ADC and the 1.5
GHz differential amplifier gain stage provide excellent
performance in this application.
performance demonstrates large signal SNR of 73.3
dBFS and SFDR greater than 85 dBFS for input signals
up to 25MHz.
diagram of the board.
The
demonstrating a quadrature direct conversion or near-
zero IF receiver for signal frequencies from DC to 40
MHz. This receiver architecture is commonly used in
WiMAX and WCDMA receiver systems.
The ADC14DS105KARB is compatible with National
Semiconductor’s WaveVision 5.1 Signal Path Digital
Interface Board and associated WaveVision software.
Please note that the ADC14DS105KARB board is not
compatible with previous versions of the WaveVision
hardware (WaveVision 4.x Digital Interface Boards).
The WaveVision hardware and software package
allows fast and easy data acquisition and analysis. The
WaveVision hardware connects to a host PC via a USB
cable and is fully configured and controlled by the latest
ADC14DS105KARB
Figure 2 shows a functional block
uses
www.national.com
a
The measured
dual
Rev 0.2
ADC,

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