HI5805EVAL1 Intersil, HI5805EVAL1 Datasheet - Page 3

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HI5805EVAL1

Manufacturer Part Number
HI5805EVAL1
Description
EVALUATION PLATFORM HI5805
Manufacturer
Intersil
Datasheets

Specifications of HI5805EVAL1

Number Of Adc's
1
Number Of Bits
12
Sampling Rate (per Second)
5M
Data Interface
Parallel
Inputs Per Adc
1 Differential
Input Range
4 Vpp
Power (typ) @ Conditions
300mW @ 5MSPS
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
HI5805
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Absolute Maximum Ratings
Supply Voltage, AV
D
Digital I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .D
Analog I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A
Operating Conditions
Temperature Range, HI5805BIB . . . . . . . . . . . . . . . . -40
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
Electrical Specifications
ACCURACY
Resolution
Integral Linearity Error, INL
Differential Linearity Error, DNL
(Guaranteed No Missing Codes)
Offset Error, V
Full Scale Error, FSE
DYNAMIC CHARACTERISTICS
Minimum Conversion Rate
Maximum Conversion Rate
Effective Number of Bits, ENOB
Signal to Noise and Distortion Ratio, SINAD
Signal to Noise Ratio, SNR
Total Harmonic Distortion, THD
2nd Harmonic Distortion
3rd Harmonic Distortion
Spurious Free Dynamic Range, SFDR
Intermodulation Distortion, IMD
Transient Response
Over-Voltage Recovery
ANALOG INPUT
Maximum Peak-to-Peak Differential Analog Input Range
(V
Maximum Peak-to-Peak Single-Ended Analog Input Range
Analog Input Resistance, R
Analog Input Capacitance, C
Analog Input Bias Current, I
Differential Analog Input Bias Current I
Full Power Input Bandwidth, FPBW
1. θ
GND
=
=
IN
------------------------------------------------------------- -
RMS Noise + Distortion
RMS Signal
------------------------------ -
RMS Noise
+ - V
JA
to A
is measured with the component mounted on an evaluation PC board in free air.
IN
RMS Signal
GND
-)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3V
OS
CC
or DV
PARAMETER
IN
B
CC
IN
+ or I
to A
3
B
AV
T
Unless Otherwise Specified
GND
-
A
B DIFF
CC
= -40
or D
= DV
o
C to 85
= (I
GND
CC1
B
+ - I
. . . . . . . . . +6.0V
= DV
o
C, Differential Analog Input, Typical Values are Test Results at 25
B
GND
GND
-)
o
CC2
C to 85
to DV
to AV
= DV
f
f
f
f
No Missing Codes
No Missing Codes
f
f
f
f
f
f
f
f
0.2V Overdrive
(Notes 2, 3)
(Note 3)
CC
CC
o
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
1
C
CC3
= 1MHz, f
HI5805
= DC
= DC
= DC
= DC
= 1MHz
= 1MHz
= 1MHz
= 1MHz
= 1MHz
= 1MHz
= 1MHz
TEST CONDITION
= +5.0V, f
2
Thermal Information
Thermal Resistance (Typical, Note 1)
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150
Maximum Storage Temperature Range . . . . . . . . . -65
Maximum Lead Temperature (Soldering, 10s) . . . . . . . . . . . .300
= 1.02MHz
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(SOIC - Lead Tips Only)
S
= 5MSPS at 50% Duty Cycle, V
10.0
HI5805BIB (-40
MIN
-10
12
5
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
TYP
±0.5
±2.0
±0.5
100
-80
-86
-83
-68
0.5
4.0
±1
19
32
11
68
68
83
10
1
2
-
-
-
-
RIN
o
C TO 85
= 3.5V, C
o
C,
MAX
+10
o
±2
±1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
C)
L
= 10pF,
o
θ
C to 150
JA
UNITS
MSPS
MSPS
Cycle
Cycle
MHz
LSB
LSB
LSB
LSB
Bits
Bits
dBc
dBc
dBc
dBc
dBc
MΩ
dB
dB
µA
µA
pF
V
V
(
70
o
C/W)
o
o
o
C
C
C

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