ADC14V155HFEB/NOPB National Semiconductor, ADC14V155HFEB/NOPB Datasheet - Page 5

• Manufacturer Part Number: ADC14V155HFEB/NOPB
• Description: BOARD EVAL ADC12V155HF >150MHZ
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of ADC14V155HFEB/NOPB

• Number Of Adc's: 1
• Number Of Bits: 14
• Sampling Rate (per Second): 155M
• Data Interface: Parallel
• Inputs Per Adc: 1 Differential
• Power (typ) @ Conditions: 951mW @ 155MSPS
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: ADC14V155
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADC14V155HFEB

4.3 ADC Reference and Input Common Mode
The internal 1.0V reference on the ADC14V155 is used
to acquire all of the results in the ADC14V155
datasheet.
reference on the ADC14V155. However, if an external
reference is required, the ADC14V155 is capable of
accepting an external reference voltage between 0.9V
and 1.1V (1.0V recommended). The input impedance
of the ADC14V155 V
Therefore, to overdrive this pin, the output impedance
of the exernal reference source should be << 9 k .
It is recommended to use the voltage at the V
(pin 45) of the ADC14V155 to provide the 1.5V
common mode voltage required for the differential
analog inputs V
evaluation board is factory-assembled with V
connected to the transformer center-tap through a
N
It is recommended to use the internal
IN+
and V
Figure 3. Analog Input Network of ADC14V155HFEB: F
Figure 2. Analog Input Network of ADC14V155LFEB: F
REF
pin (pin 46) is 9 k .
IN-
.
The ADC14V155
RM
pin
RM
ADC14V155 Evaluation Board User’s Guide
- 5 -
49.9
voltage to the differential analog input.
4.4 Board Outputs
The digitized 14-bit output word from the ADC14V155
evaluation board is presented in interleaved double
data rate (DDR) format. The digital output lines from
the ADC14V155 evaluation board consist of 18 lines
which are arranged into 9 LVDS pairs. These 9 pairs
of lines carry the 14-bit output data (7 pairs), the DRDY
signal which should be used to capture the output data
(1 pair) and the over-range bit (OVR) which indicates
that the digital output has exceeded the maximum
digitizable signal (1 pair).
Since the data is presented in interleaved double data
rate (DDR) format, the 14-bit word is output on 7 data
pair lines with half of the data (odd bits: D1+/-, D3+/-,
…, D13+/-) being emitted with one clock edge during
the first half of the clock period and the other half of the
resistor to provide the necessary common mode
IN
IN
< 150 MHz
> 150 MHz
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Rev 0.3