ADC12040EVAL National Semiconductor, ADC12040EVAL Datasheet - Page 7

• Manufacturer Part Number: ADC12040EVAL
• Description: BOARD EVALUATION FOR ADC12040
• Manufacturer: National Semiconductor

Specifications of ADC12040EVAL

• Number Of Adc's: 1
• Number Of Bits: 12
• Sampling Rate (per Second): 40M
• Data Interface: Parallel
• Inputs Per Adc: 1 Differential
• Input Range: 2 Vpp
• Power (typ) @ Conditions: 340mW @ 40MSPS
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: ADC12040
• Lead Free Status / RoHS Status: Not applicable / Not applicable

f
f
t
t
t
t
t
t
t
t
t
Symbol
CLK
CLK
CH
CL
CONV
OD
AD
AJ
DIS
EN
PD
AC Electrical Characteristics
Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, V
PD = 0V, V
limits T
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: All voltages are measured with respect to GND = AGND = DGND = 0V, unless otherwise specified.
Note 3: When the input voltage at any pin exceeds the power supplies (that is, V
50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 25 mA to two. This note
does not apply to any power or ground pin.
Note 4: The absolute maximum junction temperature (T
junction-to-ambient thermal resistance (θ
for maximum power dissipation listed above will be reached only when the device is operated in a severe fault condition (e.g. when input or output pins are driven
beyond the power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.
Note 5: Human body model is 100 pF capacitor discharged through a 1.5 kΩ resistor. Machine model is 220 pF discharged through 0Ω.
Note 6: The 235°C reflow temperature refers to infrared reflow. For Vapor Phase Reflow (VPR), the following Conditions apply: Maintain the temperature at the
top of the package body above 183°C for a minimum 60 seconds. The temperature measured on the package body must not exceed 220°C. Only one excursion
above 183°C is allowed per reflow cycle.
Note 7: The inputs are protected as shown below. Input voltage magnitudes above V
(Note 3)
full-scale input voltage must be
Note 8: To guarantee accuracy, it is required that |V
Note 9: With the test condition for V
Note 10: Typical figures are at T
Quality Level).
Note 11: Integral Non Linearity is defined as the deviation of the analog value, expressed in LSBs, from the straight line that passes through positive and negative
full-scale.
Note 12: Timing specifications are tested at TTL logic levels, V
Note 13: Optimum performance will be obtained by keeping the reference input in the 1.8V to 2.2V range. The LM4051CIM3-ADJ (SOT-23 package) is
recommended for this application.
1
2
A
. However, errors in the A/D conversion can occur if the input goes above V
Maximum Clock Frequency
Minimum Clock Frequency
Clock High Time
Clock Low Time
Conversion Latency
Data Output Delay after Rising CLK Edge
Aperture Delay
Aperture Jitter
Data outputs into TRI-STATE Mode
Data Outputs Active after TRI-STATE
Power Down Mode Exit Cycle
= T
REF
J
= 25°C (Notes 7, 8, 9, 12)
= +2.0V, f
CLK
Parameter
≤
A
4.85V to ensure accurate conversions.
= T
= 40 MHz, t
REF
J
= 25°C, and represent most likely parametric norms. Test limits are guaranteed to National's AOQL (Average Outgoing
= +2.0V (4V
JA
), and the ambient temperature, (T
r
= t
P-P
A
–V
f
differential input), the 12-bit LSB is 977 µV.
= 3 ns, C
J
D
max) for this device is 150°C. The maximum allowable power dissipation is dictated by T
|
≤
100 mV and separate bypass capacitors are used at each power supply pin.
IL
= 0.4V for a falling edge and V
V
V
V
V
L
DR
DR
DR
DR
= 20 pF/pin. Boldface limits apply for T
= 2.5V, −45°C < T
= 2.5V, T
= 3.0V, −45°C < T
= 3.0V, T
A
), and can be calculated using the formula P
7
IN
< AGND, or V
Conditions
A
A
A
A
= +25°C
= +25°C
or below GND will not damage this device, provided current is limited per
or below GND by more than 100 mV. As an example, if V
20014807
A
A
IH
IN
< +85°C
< +85°C
= 2.4V for a rising edge.
> V
A
), the current at that pin should be limited to 25 mA. The
(Note 10)
Typical
A
100
1.2
1.2
50
12
11
20
D
4
4
= T
MAX = (T
A
= V
J
= T
(Note 10)
D
Limits
11.25
11.25
J
MIN
= +5V, V
16.3
15.9
15.7
14.9
max - T
40
6
to T
A
MAX
)/θ
DR
Clock Cycles
www.national.com
A
JA
J
MHz (min)
max, the
is 4.75V, the
: all other
ns (max)
ns (max)
ns (max)
ns (max)
. The values
(Limits)
ns (min)
ns (min)
= +3.0V,
ps rms
Units
kHz
t
ns
ns
ns
CLK