AD10242/PCB Analog Devices Inc, AD10242/PCB Datasheet - Page 3

• Manufacturer Part Number: AD10242/PCB
• Description: KIT EVAL PCB FOR AD10242
• Manufacturer: Analog Devices Inc

Specifications of AD10242/PCB

• Rohs Status: RoHS non-compliant
• Number Of Adc's: 2
• Number Of Bits: 12
• Sampling Rate (per Second): 40M
• Data Interface: Parallel
• Inputs Per Adc: 1 Single Ended
• Input Range: ±2 V
• Power (typ) @ Conditions: 1.75W @ 40MSPS
• Voltage Supply Source: Analog and Digital, Dual ±
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD10242

REV. C
Parameter
SPURIOUS-FREE DYNAMIC RANGE
TWO-TONE IMD REJECTION
CHANNEL-TO-CHANNEL ISOLATION
TRANSIENT RESPONSE
LINEARITY
OVERVOLTAGE RECOVERY TIME
DIGITAL OUTPUTS
POWER SUPPLY
NOTES
10
11
12
13
14
All specifications guaranteed within 100 ms of initial power-up regardless of sequencing.
Specifications subject to change without notice.
1
2
3
4
5
6
7
8
9
± 100 kHz, 50 kHz ≤ f1 – f2 ≤ 300 kHz.
Gain tests are performed on A
Input capacitance specifications combine AD9632 die capacitance and ceramic package capacitance.
Full power bandwidth is the frequency at which the spectral power of the fundamental frequency (as determined by FFT analysis) is reduced by 3 dB.
ENCODE driven by single-ended source; ENCODE bypassed to ground through 0.01 µF capacitor.
ENCODE may also be driven differentially in conjunction with ENCODE; see Encoding the AD10242 section for details.
Minimum and maximum conversion rates allow for variation in Encode Duty Cycle of 50% ± 5%.
Analog Input signal power at –1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first five harmonics removed). Encode = 40.0 MSPS.
Analog Input signal power at –1 dBFS; signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics. Encode = 40.0 MSPS.
Analog Input signal equals –1 dBFS; SFDR is the ratio of converter full scale to worst spur.
Both input tones at –7 dBFS; two-tone intermodulation distortion (IMD) rejection is the ratio of either tone to the worst third order intermod product. f1 = 10.0 MHz
Channel-to-channel isolation tested with A channel grounded and a full-scale signal applied to B channel (A
Input driven to 2× and 4× A
Outputs are sourcing 10 µA.
Outputs are sinking 10 µA.
Analog Input @ 1.2 MHz
F1, F2 @ –7 dBFS
Differential Nonlinearity
Integral Nonlinearity
V
V
Logic Compatibility
Logic “1” Voltage
Logic “0” Voltage
Output Coding
AV
I (AV
AV
I (AV
DV
I (DV
I
Power Dissipation (Total)
Power Supply Rejection Ratio (PSRR)
Pass-Band Ripple to 10 MHz
CC
IN
IN
(Encode = 20 MHz)
(
Encode
CC
EE
CC
(Total) Supply Current
= 2.0 × FS
= 4.0 × FS
CC
EE
Supply Voltage
CC
Supply Voltage
Supply Voltage
) Current
) Current
) Current
= 20 MHz)
@ 4.85 MHz
@ 9.9 MHz
@ 19.5 MHz
13
14
IN
1 range for >4 clock cycles. Output recovers in band in specified time with Encode = 40 MSPS. No foldover guaranteed.
IN
3 over specified input voltage range.
10
12
9
11
Temp
25°C
25°C
Full
25°C
Full
25°C
Full
Full
25°C
25°C
25°C
Full
25°C
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Test
Level
I
I
II
I
II
I
II
II
IV
V
IV
IV
V
V
IV
IV
I
I
VI
V
VI
V
VI
V
I
I
I
IV
–3–
Mil
Subgroup
4
5, 6
4
5, 6
4
5, 6
4, 5, 6
12
12
12
12
12
1, 2, 3
1, 2, 3
1, 2, 3
7, 8
12
1, 2, 3
70
63
60
75
Min
70
63
60
70
3.5
IN
1).
AD10242BZ/TZ
Twos Complement
CMOS
Typ
81
80
79
70
69
67
66
76
80
10
0.3
0.5
0.3
0.5
50
75
4.2
0.45
5.0
260
–5.0
55
5.0
25
350
1.75
0.01
Max
1.0
1.25
100
200
0.65
400
2.0
0.02
0.2
Unit
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBc
dB
ns
LSB
LSB
LSB
LSB
ns
ns
V
V
V
mA
V
mA
V
mA
mA
W
% FSR/% V
dB
AD10242
S