AD9216-80PCBZ Analog Devices Inc, AD9216-80PCBZ Datasheet - Page 3
![no-image](/images/manufacturer_photos/0/0/57/analog_devices_inc_sml.jpg)
AD9216-80PCBZ
Manufacturer Part Number
AD9216-80PCBZ
Description
BOARD EVAL FOR AD9216 80MSPS
Manufacturer
Analog Devices Inc
Datasheet
1.AD9216BCPZ-65.pdf
(40 pages)
Specifications of AD9216-80PCBZ
Number Of Adc's
2
Number Of Bits
10
Sampling Rate (per Second)
80M
Data Interface
Parallel
Inputs Per Adc
2 Differential
Input Range
2 Vpp
Power (typ) @ Conditions
234mW @ 80MSPS
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD9216-80
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SPECIFICATIONS
DC SPECIFICATIONS
AVDD = 3.0 V, DRVDD = 2.5 V, maximum sample rate, CLK_A = CLK_B; A
T
Table 1.
Parameter
RESOLUTION
ACCURACY
TEMPERATURE DRIFT
INTERNAL VOLTAGE REFERENCE
INPUT REFERRED NOISE
ANALOG INPUT
REFERENCE INPUT RESISTANCE
POWER SUPPLIES
POWER CONSUMPTION
MATCHING CHARACTERISTICS
1
2
3
4
5
6
Gain error and gain temperature coefficient are based on the ADC only (with a fixed 1.0 V external reference).
Measured with low frequency ramp at maximum clock rate.
Input capacitance refers to the effective capacitance between one differential input pin and AVSS. Refer to Figure
Measured with low frequency analog input at maximum clock rate with approximately 5 pF loading on each output bit.
Standby power is measured with the CLK_A and CLK_B pins inactive (that is, set to AVDD or AGND).
Both shared reference mode and nonshared reference mode.
MIN
No Missing Codes
Offset Error
Gain Error
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
Offset Error
Gain Error
Reference Voltage
Output Voltage Error
Load Regulation @ 1.0 mA
Input Span = 2.0 V
Input Span, VREF = 1.0 V
Input Capacitance
Supply Voltages
Supply Current
PSRR
P
P
Standby Power
Offset Matching Error
Gain Matching Error (Shared Reference
Mode)
Gain Matching Error (Nonshared
Reference Mode)
AVDD
DRVDD
AVDD
DRVDD
IAVDD
IDRVDD
to T
4
4
MAX
4
1
1
, DCS enabled, unless otherwise noted.
4
5
3
6
2
2
Temp
Full
Full
Full
25°C
Full
25°C
Full
25°C
Full
Full
Full
Full
25°C
25°C
Full
25°C
25°C
Full
Full
Full
Full
25°C
25°C
25°C
25°C
25°C
25°C
25°C
VI
I
I
V
VI
V
I
I
I
Test
Level
VI
VI
VI
IV
IV
V
V
V
V
IV
V
V
IV
IV
VI
VI
I
V
V
Rev. A | Page 3 of 40
AD9216BCPZ-65
Min
10
-1.9
-1.6
-1.0
-0.9
-1.4
-1.0
2.7
2.25
-2.6
-0.4
-1.6
Guaranteed
±0.4
±0.3
±0.3
±0.5
±0.5
±15
±2
7
±0.1
±0.2
±0.1
±0.1
Typ
±0.3
±10
±75
1.0
0.5
2
2
3.0
2.5
72
15
216
38
3.0
IN
+1.0
Max
+1.9
+1.6
+1.0
+0.9
+1.4
±35
3.3
3.3
80
240
+2.6
+0.4
+1.6
= −0.5 dBFS differential input, 1.0 V internal reference,
-1.1
AD9216BCPZ-80
Min
10
-1.9
-1.6
-1.0
-0.9
-1.6
2.7
2.25
-2.6
-0.4
-1.6
Guaranteed
Typ
±0.3
±0.4
±0.4
±0.4
±0.5
±0.5
±10
±75
±15
±2
1.0
0.5
2
2
7
3.0
2.5
78
18
±0.1
234
45
3.0
±0.2
±0.1
±0.1
37
for the equivalent analog input structure.
Max
+1.6
+1.0
+0.9
+1.6
+1.1
±35
3.3
3.3
85
255
+2.6
+0.4
+1.6
+1.9
AD9216BCPZ-105
Min
10
−1.6
−1.0
−1.0
−2.5
−1.5
2.7
2.25
−2.2
−3.5
−0.6
−1.6
Guaranteed
Typ
±0.5
±0.5
±1.0
±1.0
±75
±15
±2
0.5
2
2
7
3.0
100
24
300
60
3.0
±0.3
±0.4
±10
1.0
2.5
±0.1
±0.3
±0.1
±0.3
+1.5
Max
+2.2
+1.6
+1.0
+1.0
+2.5
±35
3.3
3.3
110
330
+3.5
+0.6
+1.6
AD9216
Bits
ppm/°C
Unit
% FSR
% FSR
LSB
LSB
LSB
LSB
µV/°C
ppm/°C
mV
mV
LSB
V p-p
pF
kΩ
V
V
mA
mA
% FSR
mW
mW
mW
% FSR
% FSR
% FSR
rms