KDC5512-Q48EVAL Intersil, KDC5512-Q48EVAL Datasheet - Page 8

• Manufacturer Part Number: KDC5512-Q48EVAL
• Description: DAUGHTER CARD FOR KAD5512
• Manufacturer: Intersil
• Series: FemtoCharge™r

Specifications of KDC5512-Q48EVAL

• Number Of Adc's: 1
• Number Of Bits: 12
• Sampling Rate (per Second): 250M
• Data Interface: Parallel
• Inputs Per Adc: 1 Differential
• Input Range: 1.5 Vpp
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: KAD5512P-25, KMB001 Motherboard
• For Use With: KMB001LEVAL - MOTHERBOARD FOR LVDS ADC CARD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table of Contents
Absolute Maximum Ratings .............................. 9
Thermal Information ........................................ 9
Recommended Operating Conditions ................ 9
Electrical Specifications. ................................... 9
Digital Specifications ...................................... 12
Timing Diagrams ............................................. 13
Switching Specifications .................................. 14
Typical Performance Curves ............................ 15
Theory of Operation......................................... 18
Functional Description..................................... 18
Power-On Calibration ...................................... 18
User-Initiated Reset ....................................... 19
Analog Input ................................................. 19
VCM Output................................................... 20
Clock Input ................................................... 20
Jitter ............................................................ 20
Voltage Reference .......................................... 21
Digital Outputs .............................................. 21
Over Range Indicator...................................... 21
Power Dissipation........................................... 21
Nap/Sleep ..................................................... 21
Data Format .................................................. 22
8
KAD5512P
Serial Peripheral Interface .............................. 24
Equivalent Circuits .......................................... 30
ADC Evaluation Platform ................................. 31
Layout Considerations..................................... 31
General PowerPAD Design Considerations ...... 31
Definitions....................................................... 32
Revision History .............................................. 33
Products.......................................................... 34
Package Outline Drawing ............................... 35
Package Outline Drawing ............................... 36
SPI Physical Interface .................................... 24
SPI Configuration .......................................... 24
Device Information ........................................ 25
Indexed Device Configuration/Control .............. 25
Global Device Configuration/Control ................. 26
Device Test................................................... 27
72 Pin/48 Pin Package Options ........................ 27
SPI Memory Map ........................................... 28
PCB Layout Example ...................................... 31
Split Ground and Power Planes ........................ 31
Clock Input Considerations ............................. 31
Exposed Paddle ............................................. 31
Bypass and Filtering....................................... 31
LVDS Outputs ............................................... 31
LVCMOS Outputs ........................................... 31
Unused Inputs .............................................. 31
October 1, 2010
FN6807.4