DS26303DK Maxim Integrated Products, DS26303DK Datasheet - Page 10

• Manufacturer Part Number: DS26303DK
• Description: KIT DESIGN FOR DS26303
• Manufacturer: Maxim Integrated Products

Specifications of DS26303DK

• Main Purpose: Telecom, Line Interface Units (LIUs)
• Utilized Ic / Part: DS26303
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PROM SPI Configuration
In software mode, it is possible to configure the DS26303 using a parallel interface or a serial peripheral interface
(SPI). Most advanced microcontrollers have both a parallel interface and SPI interface such as the microcontroller
on the DS26303DK. The command you send to the microcontroller through either the USB or serial port
determines if that data is placed on the parallel or SPI bus. Refer to the data sheet for
commands required to switch data ports.
A unique feature with the SPI port is that a PROM can be used to provide the LIU with the specific data needed for
configuration. If the data in the PROM is formatted a certain way, it can seem as the PROM is acting like a
controller with a SPI interface in master mode.
The most common PROMs to use for this type of application are those with an internal address accumulator. This
feature for the PROM is important because the device must automatically jump to the next available address in the
configuration memory. The Xilinx XC18V00 device family is a byte-wide nonvolatile memory with an autoincrement
address function. The family of devices is available in 1Mb, 2Mb, and 4Mb densities. The PROM is also useful
because the device can perform in-circuit programming with the JTAG port. Refer the data sheet for the XC18V00
for the JTAG codes for programming the configuration memory.
Figure 2
device on the rising edge of SCLK. This feature can be configurable on the DS26303.
Figure 2. SPI Timing Diagram
Figure 3
key points about this diagram. First, the CLK for the XC18V00 is the MCLK for the LIU, but this is not the SCLK for
the SPI interface. The SCLK can be programmed as needed. See
Second, the programming for this device begins when OE on the XC18V00 goes high. Therefore, consideration
must be taken if some delay is necessary. Generally, it is sufficient for the OE pin to be connected to some power-
up delay device. The OE delay is not necessary on this DK.
SCLK
CSB
SDI
shows a general relationship of the timing for a SPI bus. For this case, all data is clocked into the slave
shows a simplified diagram of the XC18V00 device and the DS26303 in SPI (serial) mode. Notice a few
SDO
(lsb)
WRITE ACCESS ENABLED
0
1
A1
2
A2
3
A3
4
A4
5
A5
6
A
6
7
(adrs
msb)
x
8
10 of 43
DO
(lsb)
9
10
D1
Table 5
D2
11
D3
12
for an example of the memory map.
D4
13
D5
14
Chipview
D6
15
(msb)
D7
on the particular
16