SI5367/68-EVB Silicon Laboratories Inc, SI5367/68-EVB Datasheet - Page 7

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SI5367/68-EVB

Manufacturer Part Number
SI5367/68-EVB
Description
BOARD EVAL FOR SI5367/68
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI5367/68-EVB

Main Purpose
Timing, Clock Generator
Utilized Ic / Part
SI5367, SI5368
Processor To Be Evaluated
Si5367 and Si5368
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
2. Pin Descriptions: Si5367
Note: Internal register names are indicated by underlined italics, e.g. INT_PIN. See Si5368 Register Map.
1, 2, 4, 17, 20,
22, 23, 24, 25,
37, 47, 48, 49,
50, 51, 52, 53,
56, 66, 67, 72,
73, 74, 75, 80,
85, 95
Pin #
3
CS0_C3A
INT_ALM
Pin Name
GND
GND
GND
GND
GND
GND
GND
VDD
VDD
RST
VDD
C1B
C2B
C3B
NC
NC
NC
NC
NC
NC
NC
NC
NC
RST
NC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
1
2
3
4
5
6
7
8
9
100
26
99
27
98
28
97
29
I/O
Table 3. Si5367 Pin Descriptions
I
96
30
95
31
32
Signal Level
94
LVCMOS
33
93
34
Preliminary Rev. 0.4
92
91
35
90
Si5367
GND PAD
36
89
37
88
38
No Connect.
These pins must be left unconnected for normal opera-
tion.
External Reset.
Active low input that performs external hardware reset of
device. Resets all internal logic to a known state and
forces the device registers to their default value. Clock
outputs are disabled during reset. The part must be pro-
grammed after a reset or power-on to get a clock output.
See Family Reference Manual for details.
This pin has a weak pull-up.
39
87
86
40
41
85
84
42
83
43
82
44
45
81
80
46
79
47
48
78
Description
77
49
76
50
75
74
73
72
71
70
69
68
67
65
66
64
63
62
60
59
58
57
56
55
54
53
52
51
61
NC
NC
NC
NC
SDI
A2_SS
A1
A0
NC
NC
GND
GND
VDD
VDD
SDA_SDO
SCL
C2A
C1A
CS1_C4A
NC
GND
GND
NC
NC
NC
Si5367
7

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