EL4584CSZ-EVAL Intersil, EL4584CSZ-EVAL Datasheet

EL4584CSZ-EVAL

Manufacturer Part Number

EL4584CSZ-EVAL

Description

EVALUATION BOARD FOR EL4584

Manufacturer

Intersil

Datasheets

1.EL4584CSZ.pdf (15 pages)

2.EL4584CSZ-EVAL.pdf (3 pages)

Specifications of EL4584CSZ-EVAL

Main Purpose

Timing, PLL

Embedded

Utilized Ic / Part

EL4584CSZ

Primary Attributes

Designed for Video up to 36 MHz

Secondary Attributes

5V supply, < 2ns jitter (VCXO)

Lead Free Status / RoHS Status

Not applicable / Not applicable

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Video Sync Separator, Horiz Genlock

operations of Intersil’s family of sync separators and

horizontal genlocks. The board as assembled is designed to

accept NTSC standard video through A4, Video In. The

EL4583 separates H-sync and sends it through jumper R10

to the EL4584. H-sync can be monitored at A1, H-sync. On

the board settings, the internal divider mode is selected and

the divider N is set to 910. The EL4584 uses its internal

divider to extract a clock pulse of the same H-sync input

frequency from the oscillator and adjusts the on-board LC

VCO to phase lock this signal to the input horizontal

frequency. This divided clock signal can be monitored at A2,

EXT DIV. The full clock frequency (which should equal to

H-sync (15.734kHz)*divider (910) = 14.318MHz) is available

at A3, CLK OUT. Each board has been tested with a NTSC

signal and C17 adjusted so EXT DIV locks to the H-sync.

SW1 has 3 positions. LEFT grounds COAST and puts the

EL4584 into normal mode (see data sheet for mode

descriptions). CENTER floats COAST and is fast lock mode,

and RIGHT pulls COAST to VDD and is coast mode. The

signal should lock in normal mode. The DIP switches at the

top of the board works as follows: from right to left, the

EL4583 and EL4584

The EL4583, EL4584, EL4585 demo

board is designed to demonstrate the

Technical Brief

1-888-INTERSIL or 321-724-7143

EL4583, EL4584, EL4585 Demo Board

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

switches should be labeled 1, 2, 3, 4. Dip-SW4 controls pin

B, SW3 controls C, SW2 controls A, and SW1 controls DIV

SEL pin 7 on the EL4584. Refer to the data sheet for a table

of divisors for each switch setting and the operation of DIV

SEL. If using a NTSC signal, setting all switches ON will

produce a CLK OUT frequency of 14.318MHz, and an EXT

DIV frequency of 15.734kHz, and the EL4584 will lock.

To convert the oscillator to work with the standard PAL

frequency of 17.734MHz, simply substitute an inductor of

about 8.2µH to bring the center frequency up closer to PAL

frequency of 17.734MHz, and reset the dip switches to

A = 0, B = 1, C = 1. Remember that LC VCOs have a wide

pull range so they are very tolerant of component variations.

In some cases the 10µH inductor may be able to produce

the necessary PAL frequency as well as the NTSC

frequency.

Crystal VCXOs and 4-pin VCXO hybrids can also be used.

See the accompanying schematics and data sheet for more

info.

EL4585

An EL4585 can be used in place of the EL4584 provided.

With R1 changed to 3.3µH and the same settings as in the

EL4584 section, The signal frequency at CLK OUT is

28.636MHz.

February 24, 2004

All other trademarks mentioned are the property of their respective owners.

Intersil (and design) is a registered trademark of Intersil Americas Inc.

TB430

Related parts for EL4584CSZ-EVAL

EL4584CSZ-EVAL Summary of contents

Page 1

... CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 321-724-7143 Copyright © Intersil Americas Inc. 2004. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc. All other trademarks mentioned are the property of their respective owners. TB430 Intersil (and design registered trademark of Intersil Americas Inc. ...

Page 2

... LOCK DET TP7 VDD C12 6 11 ANALOG GND DG VDD 0.1uF 7 10 CHARGE PUMP HSYNC IN SW1 SEL COAST 0.001uF Error : intersil.bmp file not found. Title EL1881/4581/3/4/5 DEMO BOARD Size: A Date: 12/17/03 Sheet EL4583 4 Sch Drawn By: File: R8 10K A3 CLK-OUT A2 EXT-DIV A1 H-SYNC VDD R10 0 Revision: ...

Page 3

... Charge Pump Output Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com ...

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