FPDXSDUR-43USB/NOPB National Semiconductor, FPDXSDUR-43USB/NOPB Datasheet - Page 3

• Manufacturer Part Number: FPDXSDUR-43USB/NOPB
• Description: KIT EVAL DS99R421 CONV TO LVDS
• Manufacturer: National Semiconductor

Specifications of FPDXSDUR-43USB/NOPB

• Main Purpose: Interface, Serializer, Deserializer (SERDES)
• Utilized Ic / Part: DS90UR124, DS99R421
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Other names: FPDXSDUR-43USB

Introduction:
National Semiconductor’s DS99R421 standard multi-channel LVDS to FPD-Link II
translator SERDES evaluation kit contains 1 - DS99R421 translator board and 1 -
DS90UR124 De-serializer (Rx) board, and 1 - two (2) meter high speed USB 2.0 cable.
Note: the evaluation boards are not for EMI testing. The evaluation boards were
designed for easy accessibility to device pins with tap points for monitoring or applying
signals, additional pads for termination, loading, and multiple connector options.
The DS99R421 and DS90UR124 chipset supports a variety of display and general
purpose applications. The single FPD-Link II interface is well-suited for any display
system interface. Typical applications include: navigation displays, automated teller
machines (ATMs), POS, video cameras, global positioning systems (GPS), portable
equipment/instruments, factory automation, etc.
The DS99R421 can be used to take existing standard multi-channel LVDS and convert
them to a single channel FPD-Link II format. DS99R421 can be used as a 21-bit
general purpose LVDS translator used in conjunction with the DS90UR124 FPD-Link II
De-serializer chipset and transmit data at clocks speeds ranging from 5 to 43 MHz.
The DS99R421 LVDS to FPD-Link II translator board accepts four (4) standard LVDS
multi-channel LVDS input signals and converts them into a single serialized FPD-Link II
data pair with an embedded LVDS clock. The serial data stream toggles at 28 times the
base clock rate with an input clock at up to 43 MHz. The maximum transmission rate
for the FPD-Link II line is 1.204Gbps.
The DS90UR124 de-serializer board accepts the FPD-Link II serialized data stream with
embedded clock and converts the serialized data back into parallel 3.3V_LVCMOS
signals and clock. Note that NO reference clock is needed to prevent harmonic lock.
Suggested equipment to evaluate the chipset are: a standard LVDS signal source such
as a video generator, or FPD or Channel Link or equivalent transmitter and/or word
generator or pulse generator and oscilloscope with a bandwidth of at least 43 MHz will
be needed.
The user needs to provide the standard multi-channel LVDS inputs to the LVDS
translator and also provide a proper interface from the de-serializer output to an LCD
panel or test equipment. The translator and de-serializer boards can also be used to
evaluate device parameters. A cable conversion board or harness scramble may be
necessary depending on type of cable/connector interface used on the input to the
DS99R421 and to the output of the DS90UR124.
Example of suggested display setup:
1) video generator with an 18 bit data LVDS output
2) 18-bit LCD panel with a 3.3V_LVCMOS input interface.
National Semiconductor Corporation
Date: 5/12/2008
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