ISL55110EVAL2Z Intersil, ISL55110EVAL2Z Datasheet

ISL55110EVAL2Z

Manufacturer Part Number

ISL55110EVAL2Z

Description

EVALUATION BOARD FOR ISL55110

Manufacturer

Intersil

Datasheet

1.ISL55110EVAL2Z.pdf (4 pages)

Specifications of ISL55110EVAL2Z

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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Before Getting Started

This document supplements the ISL55110, ISL55111

Specification FN6228. Evaluation board users should review

that document to obtain information on the parts’ basic

functionality and power requirements. A most important note

is before powering up the board, review the Power Up

Sequence in that specification. There are two DC sources

utilized, so a user may inadvertently mis-apply the power

sources causing damage to the part.

Take time to review the ISL55110, ISL55111 Data Sheet

(FN6228) and become familiar with the part’s basic functions

and power options. Note also that FN6228 supersedes this

document with respect to updates and modifications. Always

refer to that document if discrepancies occur.

All ISL55110, ISL55111 QFN and TSSOP boards are

designed essentially in the same fashion. This document

provides the user with the information regarding the

evaluation board design, circuitry layout and driver load

options.

Scope Probe Connections

Another topic to cover before getting started is the evaluation

board physical connections for waveform observations. On

each schematic version you will see a component with pins

designated as DIF+ and DIF-. This is not an active

component but a dual pin header physically designed to

accommodate leadless connection of active differential or

FET Probes. This will minimize ground lead inductance and

capacitive loading while making waveform observations.

However, the user must also be mindful of max voltage

limitations when using these types of probes. The ISL55110,

ISL55111 drivers cover a large voltage range, so double

check the probe’s specifications.

Scope Probe Test Points (TP) are provisioned across all

inputs, outputs and VDD/VH to ground.

Application Note

ISL55110_11EVAL1Z, ISL55110_11EVAL2Z

1-888-INTERSIL or 1-888-468-3774

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Evaluation Board User’s Manual

BNC Connections

This series of evaluation boards also provides BNC

connections for Input and Output signals. A key point to

remember is the ISL55110, ISL55111 Driver Outputs

(OA/OB) operate with the VH voltage as a High and Ground

as a Low. These connectors are laid out to accommodate

SMD connectors as well as BNC’s. Also note that the Driver

Inputs have 50Ω terminations that you may need to remove

for your application.

Power Down Feature

All boards provide the same capability for testing the Power

Down Feature. A SPDT- Center OFF switch is provided for

manual testing of the feature. In one position the PD input is

connected to VDD (Power Down Enabled). In the other

position the PD Input is connected to Ground.

DRIVER OUT

February 13, 2007

FIGURE 1. DUAL.1” SPACED PINS ARE PLACED ON THE

All other trademarks mentioned are the property of their respective owners.

Intersil (and design) is a registered trademark of Intersil Americas Inc.

EVALUATIONS BOARDS FOR LEADLESS ACTIVE

PROBE CONNECTIONS

DIF-

DIF+

SCOPE PROBE CONNECTIONS

TP-OB

IN_B - BNC

NOT

POPULATED

0Ω

50Ω

GND

DIF-

DIF+

GND

NOT

POPULATED

0Ω

DRIVER INPUT

TP-IN_B

DIF-

DIF+

AN1283.0

OB - BNC

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ISL55110EVAL2Z Summary of contents

Page 1

... VDD (Power Down Enabled). In the other position the PD Input is connected to Ground. CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. All other trademarks mentioned are the property of their respective owners. AN1283.0 DIF+ DIF- ...

Page 2

S1 - POWER DOWN CONTROL SPDT - CENTER OFF VDD R7 GND 10k VDD 1 VDD GND ISL55110, ISL55111_TSSOP FIGURE 2. TSSOP AND QFN EVALUATION BOARDS HAVE ...

Page 3

IN_B - BNC TP-IN_B DIF+ R1 50Ω DIF- GND IN_A - BNC TP-IN_A R2 DIF+ 50Ω DIF- GND VH - BANANA JACK . 3 Application Note 1283 S1 - POWER DOWN CONTROL SPDT - CENTER OFF VDD PD - BNC ...

Page 4

... GND VH - BANANA JACK Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com ...

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