LMX25313010EVAL National Semiconductor, LMX25313010EVAL Datasheet - Page 26

BOARD EVAL FOR LMX25131LQ 3010

LMX25313010EVAL

Manufacturer Part Number
LMX25313010EVAL
Description
BOARD EVAL FOR LMX25131LQ 3010
Manufacturer
National Semiconductor
Series
PowerWise®r

Specifications of LMX25313010EVAL

Main Purpose
Timing, Frequency Synthesizer
Embedded
No
Utilized Ic / Part
LMX2531LQ3010
Primary Attributes
Low Band 1455 - 1566 MHz, High Band 2910 - 3132 MHz
Secondary Attributes
2.8 V ~ 3.2 V Supply
Silicon Manufacturer
National
Silicon Core Number
LMX2531
Kit Application Type
Clock & Timing
Application Sub Type
Frequency Synthesizer
Kit Contents
Board, Cable, CD
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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2.4.4 DITHER -- Dithering
Dithering is useful in reducing fractional spurs, especially those that occur at a fraction of the channel spacing. The only exception
is when the fractional numerator is zero. In this case, dithering usually is not a benefit. Dithering also can sometimes increase the
PLL phase noise by a fraction of a dB. In general, if dithering is disabled, phase noise may be slightly better inside the loop bandwidth
of the system, but spurs are likely to be worse too.
2.4.5 FDM -- Fractional Denominator Mode
When this bit is set to 1, the 10 MSB bits for the fractional numerator and denominator are considered. This allows the fractional
denominator to range from 1 to 4,194,303. If this bit is set to zero, only the 12 LSB bits of the fractional numerator and denominator
are considered, and this allows a fractional denominator from 1 to 4095. When this bit is disabled, the current consumption is about
0.5 mA lower.
2.4.6 -- DIV2
When this bit is enabled, the output of the VCO is divided by 2. Enabling this bit does have some impact on harmonic content and
output power.
DITHER
DIV2
0
1
2
3
0
1
26
VCO Output Frequency
Dithering Disabled
Dithering Mode
Strong Dithering
Not Divided by 2
Weak Dithering
Divided by 2
Reserved

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