DS91M040EVK/NOPB National Semiconductor, DS91M040EVK/NOPB Datasheet - Page 4

• Manufacturer Part Number: DS91M040EVK/NOPB
• Description: BOARD EVALUATION DS91M040
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of DS91M040EVK/NOPB

• Main Purpose: Interface, M-LVDS, Transceiver
• Utilized Ic / Part: DS91M040
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Other names: DS91M040EVK

DS91M040 Evaluation in an ATCA Backplane
The following is a recommended procedure for building an evaluation M-LVDS clock distribution network with
DS91M040EVK evaluation boards. The assumption is that the user already has an ATCA backplane. Figure 2
depicts configuration of a generic M-LVDS clock network in an ATCA backplane.
April 14, 2008
Rev. 1.0
1. Use two or more DS91M040 evaluation boards and install them at backplane location J20/P20, in the
2. Apply the power to the boards (3.3V typical) between J5 and J6 banana plug receptacles, observe the
3. Select the board you want to configure as a clock driver/distributor. This is accomplished by setting DE
4. Configure the remaining boards as clock receivers. This is accomplished by setting DE and RE* pins to
5. Observe clock waveforms by either connecting receiver LVCMOS output pins (J2) directly to an
desired slots.
value of I
are functional.
and RE* pins to VDD (J1 or J3). Set MDE pin to VDD. Connect a clock source to one of the driver
inputs (J2).
GND (J1 or J3). Set MDE pin to VDD. Set the receiver to either M-LVDS Type 1 (FSEN pins set to
GND) or Type 2 (FSEN pins set to VDD).
oscilloscope or by probing receiver M-LVDS input pins with a differential probe.
CC,
and compare it with the expected value (refer to the datasheet) to ensure that the devices
Figure 2 - M-LVDS Clock Distribution Network in an ATCA Backplane
© 2008, National Semiconductor Corp.
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