DP83816-MAAP National Semiconductor, DP83816-MAAP Datasheet - Page 37
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DP83816-MAAP
Manufacturer Part Number
DP83816-MAAP
Description
BOARD EVALUATION DP83816
Manufacturer
National Semiconductor
Datasheet
1.DP83816AVNGNOPB.pdf
(106 pages)
Specifications of DP83816-MAAP
Main Purpose
Interface, Ethernet
Utilized Ic / Part
DP83816
Lead Free Status / RoHS Status
Not applicable / Not applicable
Secondary Attributes
-
Embedded
-
Primary Attributes
-
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4.0 Register Set
4.1.12 Power Management Control and Status Register
This register contains PM control and status information.
31-24
23-16
24-22
18-16
14-9
15-8
Bit
7-2
1-0
Bit
7-0
15
21
20
19
8
AUX_CURRENT Aux_Current
Bit Name
PMESTS
PSTATE
PMEEN
Bit Name
NLIPTR
BSE
CAPID
PMEC
PMV
DSI
Offset: 44h
(Continued)
Tag: PMCSR
Reserved
(reads return 0)
Bridge Support Extensions
unused (reads return 0)
PME Status
Sticky bit which represents the state of the PME logic, regardless of the state of the PMEEN bit.
Reserved
(reads return 0)
PME Enable
When set to 1, this bit enables the assertion of the PME function on the PMEN pin. When 0, the PMEN
pin is forced to be inactive. This value can be loaded from the EEPROM.
Unused
(reads return 0)
Power State
This 2 bit field is used to determine the current power state of DP83816, and to set a new power state.
This 3 bit field reports the 3.3Vaux auxiliary current requirements for the PCI function.
If PMEN generation from D3cold is not supported by the function(PMCAP[31]), this field returns a
value of "000b" when read.
Device Specific Initialization
This bit is set to 1 to indicate to the system that initialization of the DP83816 device is required
(beyond the standard PCI configuration header) before the generic class device driver is able to use
it. A 1 indicates that DP83816 requires a DSI sequence following transition to the D0 uninitialized
state. This bit can be loaded from the EEPROM.
Reserved
(reads return 0)
PME Clock
Returns 0 to indicate PCI clock not needed for PMEN.
Power Management Version
This bit field indicates compliance to a specific PM specification rev level. Currently set to 010b.
Next List Item Pointer
Offset into PCI configuration space for the location of the next item in the Capabilities Linked List.
Returns 00h as no other capabilities are offered.
Capability ID
Always returns 01h for Power Management ID.
24 23 22
1 1 0
0 0 0
Bit
00 - D0
01 - D1
3.3Vaux
Max. Current Required
320 mA
0 (self powered)
Access: Read Write
10 - D2
11 - D3hot/cold
Size: 32 bits
37
Description
Description
Hard Reset: 00000000h
Soft Reset: unchanged
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