KIT33996EKEVB Freescale Semiconductor, KIT33996EKEVB Datasheet - Page 20

• Manufacturer Part Number: KIT33996EKEVB
• Description: KIT EVAL 33996 16OUTPUT SW W/SPI
• Manufacturer: Freescale Semiconductor

Specifications of KIT33996EKEVB

• Main Purpose: Power Management, Low Side Driver (Internal FET)
• Embedded: No
• Utilized Ic / Part: MC33996
• Primary Attributes: 16 Outputs, 5 ~ 27V, 0.9 ~ 2.5A, SPI Interface, PWM Interface
• Secondary Attributes: 0.55 Ohm RdsON, Temperature, Over Voltage, Short Circuit Protection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADDITIONAL DOCUMENTATION
THERMAL ADDENDUM (REV 2.0)
Introduction
datasheet. The addendum provides thermal performance information that may be
critical in the design and development of system applications. All electrical,
application, and packaging information is provided in the datasheet.
Packaging and Thermal Considerations
There is a single heat source (P), a single junction temperature (T
resistance (R
package to another in a standardized environment. This methodology is not meant
to and will not predict the performance of a package in an application-specific
environment. Stated values were obtained by measurement and simulation
according to the standards listed below.
Standards
Table 7. Thermal Performance Comparisons
20
33996
ADDITIONAL DOCUMENTATION
THERMAL ADDENDUM (REV 2.0)
Notes:
This thermal addendum is provided as a supplement to the MC33996 technical
The MC33996 is offered in a 32 pin SOICW exposed pad, single die package.
The stated values are solely for a thermal performance comparison of one
1.
2.
3.
4.
5.
Thermal Resistance
Per JEDEC JESD51-2 at natural convection, still air
condition.
2s2p thermal test board per JEDEC JESD51-5 and
JESD51-7.
Per JEDEC JESD51-8, with the board temperature on the
center trace near the center lead.
Single layer thermal test board per JEDEC JESD51-3 and
JESD51-5.
Thermal resistance between the die junction and the
exposed pad surface; cold plate attached to the package
bottom side, remaining surfaces insulated.
R
R
R
R
θJA
θJB
θJA
θJC
θJA
(1),
(2),
(1),
(5)
).
(2)
(3)
(4)
T
J
=
R
θJA
[°C/W]
9.0
2.0
29
69
.
P
J
), and thermal
Figure 14. Surface Mount for SOICW Exposed Pad
*All Measurements
are in Millimeters
4.6 mm x 5.7 mm Exposed Pad
11.0 mm x 7.5mm Body
32 Pin SOICW-EP
Note For package dimensions, refer to
the 33996 data sheet.
0.65 Pitch
Analog Integrated Circuit Device Data
EK (PB-FREE) SUFFIX
32-PIN SOICW-EP
98ARL10543D
33996EK
SOICW-EP
32-PIN
Freescale Semiconductor
0.2
1.0
0.2
1.0