DP83848T-MAU-EK National Semiconductor, DP83848T-MAU-EK Datasheet - Page 32
DP83848T-MAU-EK
Manufacturer Part Number
DP83848T-MAU-EK
Description
BOARD EVALUATION DP83848T
Manufacturer
National Semiconductor
Specifications of DP83848T-MAU-EK
Main Purpose
Interface, Ethernet
Utilized Ic / Part
DP83848T
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
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5.0 Design Guidelines
5.1 TPI Network Circuit
Figure 11 shows the recommended circuit for a 10/100
Mb/s twisted pair interface. To the right is a partial list of
recommended transformers. It is important that the user
realize that variations with PCB and component character-
istics requires that the application be tested to ensure that
the circuit meets the requirements of the intended applica-
tion.
CAPACITORS CLOSE TO
PLACE RESISTORS AND
THE DEVICE.
RD-
RD+
TD-
TD+
49.9
49.9
49.9
49.9
Figure 11. 10/100 Mb/s Twisted Pair Interface
Vdd
Vdd
0.1 F
0.1 F
32
Vdd
A
Pulse H1102
Pulse H2019
Pulse J0011D21
Pulse J0011D21B
ll values are typical and are +/- 1%
NOTE: CENTER TAP IS PULLED TO VDD
*PLACE CAPACITORS CLOSE TO THE
0.1µF*
0.1µF*
TRANSFORMER CENTER TAPS
COMMON MODE CHOKES
MAY BE REQUIRED.
1:1
1:1
T1
RD-
RD+
TD-
TD+
RJ45
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