SD001EVK National Semiconductor, SD001EVK Datasheet - Page 3

• Manufacturer Part Number: SD001EVK
• Description: BOARD EVALUATION CLC001
• Manufacturer: National Semiconductor

Specifications of SD001EVK

• Design Resources: CLC001 Eval Board Schematic
• Main Purpose: Interface, Digital Cable Driver
• Utilized Ic / Part: CLC001
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -

1. VBB
The CLC001 provides a bias voltage through its VBB pin. Place a jumper on P1
connecting the pins labeled “Vbb” and “Input” to bias the inputs in this manner. RBB
(R7) set at 4.99 k
1.0 V
2. VDD
The CLC001 may be biased with the VDD supply by placing a jumper connecting the
pins labeled “Vdd” and “Input”. This will bias the inputs at 1.5-1.7V, or roughly half of
the VDD voltage.
Please refer to the datasheet for more details on input interfacing.
Adjusting the Output Level
Output level is determined by the value of R
with no jumper in place, which sets the output at 800 mV
enabled at P2, R
may be set to various values up to 1.0 V
desired value of R
sensitivity to R
is shown in Figure 2 below.
p-p
output.
Figure 2. Typical Waveform at 622 Mbps and 1.0 V
REF
REF
. A typical output waveform at 622 Mbps and 1.0 V
REF
should provide around 1.25V at 800 mV
becomes 1.5 k
. Refer to Figure 10 of the datasheet for the output level’s
National Semiconductor Corporation
CLC001 Evaluation Board User Guide
Interface Products
and the output is 1.0 V
p-p
REF,
by replacing R5 and/or R6 to get the
which is set by P2. R
p-p
Rev 1.1
Date: 7/11/2001
Page 3 of 4
p-p
Output Level
p-p
p-p
. With the jumper
output, and 1.5V at
. The output level
p-p
REF
output level
is 1.91 k